Dielectric Stack Optimization for Die-level Warpage Reduction for Chip-to-Wafer Hybrid Bonding

BSSC Rao, MD Kumar, VN Sekhar… - 2024 IEEE 74th …, 2024 - ieeexplore.ieee.org
Chip-to-wafer hybrid bonding is a promising packaging technology for bumpless and high-
density interconnection. However, this approach presents numerous challenges during die …

Sub-0.5 μm Pitch Scaling of W2W Cu/Dielectric Hybrid Bonding

HK Cheemalamarri, A Sundaram… - 2024 IEEE 74th …, 2024 - ieeexplore.ieee.org
Hybrid bonding, a crucial technique in heterogeneous package integration, holds immense
potential for advancing pitch scaling in semiconductor technologies. As three-dimensional …