Unarbitrated contention over shared resources at different levels of the memory hierarchy
represents a major source of temporal interference. Hardware manufacturers are …

The interference co-running tasks generate on each other's timing behavior continues to be
one of the main challenges to be addressed before Multi-Processor System-on-Chip …

Abstract Multiprocessor Systems-on-Chip (MPSoC) integrating hard processing cores with
programmable logic (PL) are becoming increasingly common. While these platforms have …

We present NyxCache (Nyx), an access regulation framework for multi-tenant persistent
memory (PM) caching that supports light-weight access regulation, per-cache resource …

On multi-core processors, contention on shared resources such as the last level cache (LLC)
and memory bandwidth may cause serious performance degradation, which makes efficient …

Following the needs of industrial applications, virtualization has emerged as one of the most
effective approaches for the consolidation of mixed-criticality systems while meeting tight …

A μ-kernel is an operating system (OS) paradigm that facilitates a strong cybersecurity
posture for embedded systems. Unlike a monolithic OS such as Linux, a μ-kernel reduces …

Heterogeneous SoC platforms, comprising both general purpose CPUs and accelerators,
such as a GPU, are becoming increasingly attractive for real-time and mixed-criticality …

Many applications require both high performance and predictable timing. High-performance
can be provided by COTS Multi-Core System on Chips (MPSoC), however, as cores in these …

Autonomous driving is disrupting conventional automotive development. Underlying
reasons include control unit consolidation, the use of components originally developed for …