A survey of mobile device virtualization: Taxonomy and state of the art

J Shuja, A Gani, K Bilal, AUR Khan… - ACM Computing …, 2016 - dl.acm.org
Recent growth in the processing and memory resources of mobile devices has fueled
research within the field of mobile virtualization. Mobile virtualization enables multiple …

A comprehensive survey on Software as a Service (SaaS) transformation for the automotive systems

DF Blanco, F Le Mouël, T Lin, MP Escudié - IEEE Access, 2023 - ieeexplore.ieee.org
Over the last few decades, automotive embedded Information and Communication
Technology (ICT) systems have been used to enhance vehicle performance and enrich …

Performance analysis and optimization for SpMV based on aligned storage formats on an ARM processor

Y Zhang, W Yang, K Li, D Tang, K Li - Journal of Parallel and Distributed …, 2021 - Elsevier
Sparse matrix-vector multiplication (SpMV) has always been a hot topic of research for
scientific computing and big data processing, but the sparsity and discontinuity of the …

Quantum instruction set design for performance

C Huang, T Wang, F Wu, D Ding, Q Ye, L Kong… - Physical Review Letters, 2023 - APS
A quantum instruction set is where quantum hardware and software meet. We develop
characterization and compilation techniques for non-Clifford gates to accurately evaluate its …

QoE-aware computation offloading to capture energy-latency-pricing tradeoff in mobile clouds

ST Hong, H Kim - IEEE Transactions on mobile computing, 2018 - ieeexplore.ieee.org
Computation offloading in mobile clouds helps mobile users save energy and enhance
performance via mobile-to-cloud migration of processing. Although there exist many …

X86-64 instruction usage among c/c++ applications

A Akshintala, B Jain, CC Tsai, M Ferdman… - Proceedings of the 12th …, 2019 - dl.acm.org
This paper presents a study of x86-64 instruction usage across 9,337 C/C++ applications
and libraries in the Ubuntu 16.04 GNU/Linux distribution. We present metrics for reasoning …

Uc-check: Characterizing micro-operation caches in x86 processors and implications in security and performance

J Kim, H Jang, H Lee, S Lee, J Kim - MICRO-54: 54th Annual IEEE/ACM …, 2021 - dl.acm.org
The modern x86 processor (eg, Intel, AMD) translates CISC-style x86 instructions to RISC-
style micro operations (uops) as RISC pipelines are more efficient than CISC pipelines …

Decentralized real-time optimization of voltage reconfigurable cloud computing data center

S Hou, W Ni, S Zhao, B Cheng… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
Dynamic Voltage and Frequency Scaling, and Adaptive Body Biasing are increasingly
adopted hardware techniques to improve energy efficiency of multi-core servers by adjusting …

Empirical study of the power consumption of the x86-64 instruction decoder

M Hirki, Z Ou, KN Khan, JK Nurminen… - USENIX Workshop on …, 2016 - usenix.org
It has been a common myth that x86-64 processors suffer in terms of energy efficiency
because of their complex instruction set. In this paper, we aim to investigate whether this …

Can Software Containerisation Fit The Car On-Board Systems?

DF Blanco, F Le Mouël, T Lin… - 2023 IEEE International …, 2023 - ieeexplore.ieee.org
As the automotive industry evolves towards inter-connected and intelligent vehicles, the
integration of complex electronic and software components has become paramount …