Enhancement-mode GaAs MOSFETs with an In0. 3 Ga0. 7As channel, a mobility of over 5000 cm2/V· s, and transconductance of over 475 μS/μm

RJW Hill, DAJ Moran, X Li, H Zhou… - IEEE Electron Device …, 2007 - eprints.gla.ac.uk
We present metal-gate high-k-dielectric enhancement-mode (e-mode) III-V MOSFETs with
the highest reported effective mobility and transconductance to date. The devices employ a …

High mobility III-V MOSFETs for RF and digital applications

M Passlack, P Zurcher, K Rajagopalan… - 2007 IEEE …, 2007 - ieeexplore.ieee.org
Developments over the last 15 years in the areas of materials and devices have finally
delivered competitive III-V MOSFETs with high mobility channels. This paper briefly reviews …

Benchmarking of scaled InGaAs implant-free nanoMOSFETs

K Kalna, N Seoane, AJ Garcia-Loureiro… - IEEE transactions on …, 2008 - ieeexplore.ieee.org
The potential performance of n-type implant-free (IF) III-V nanoMOSFETs with an In 0.75 Ga
0.25 As channel is studied using finite-element heterostructure Monte Carlo (MC) and …

Impact of interface state trap density on the performance characteristics of different III–V MOSFET architectures

B Benbakhti, JS Ayubi-Moak, K Kalna, D Lin… - Microelectronics …, 2010 - Elsevier
The effect of interface state trap density, Dit, on the current–voltage characteristics of four
recently proposed III–V MOSFET architectures: a surface channel device, a flat-band implant …

Monte Carlo Study of Ultimate Channel Scaling in Si and InGaAs Bulk MOSFETs

A Islam, B Benbakhti, K Kalna - IEEE transactions on …, 2011 - ieeexplore.ieee.org
A detailed analysis of nonequilibrium electron transport in n-type Si and In 0.3 Ga 0.7 As
MOSFETs scaled into ultimate limit of 5-nm gate length is carried out using ensemble Monte …

High Mobility III-V Mosfet Technology

M Passlack, R Droopad, K Rajagopalan… - 2006 IEEE …, 2006 - ieeexplore.ieee.org
In recent years, fundamental interface issues have been overcome and GaAs MOS
technology has advanced to the level of device fabrication. This development has been …

Simulation Study of Performance for a 20-nm Gate Length InGaAs Implant Free Quantum Well MOSFET

B Benbakhti, A Martinez, K Kalna… - IEEE transactions on …, 2012 - ieeexplore.ieee.org
An nMOSFET for the future high mobility dual-channel CMOS based on anew In 0.53 Ga
0.47 As implant free quantum well architecture is optimized to achieve low leakage and high …

Design and analysis of the In0. 53Ga0. 47As implant-free quantum-well device structure

B Benbakhti, K Kalna, KH Chan, E Towie… - Microelectronic …, 2011 - Elsevier
The In0. 53Ga0. 47As implant-free quantum-well device architecture is optimized to achieve
low leakage and high transistor performance by using ensemble Monte Carlo and TCAD …

Monte carlo simulations of ingaas nano-mosfets

K Kalna, R Droopad, M Passlack, A Asenov - Microelectronic engineering, 2007 - Elsevier
The potential performance of sub-50 nm n-type implant free III-V MOSFETs with an In0.
75Ga0. 25As channel is studied using Monte Carlo (MC) device simulations. The simulated …

Enhancement-Mode GaAs MOSFETs With an Channel, a Mobility of Over 5000 , and Transconductance of Over 475

RJW Hill, DAJ Moran, X Li, H Zhou… - IEEE Electron …, 2007 - ieeexplore.ieee.org
We present metal-gate high-k-dielectric enhancement-mode (e-mode) III-V MOSFETs with
the highest reported effective mobility and transconductance to date. The devices employ a …