A continuous-rate referenceless clock and data recovery (CDR) circuit with an unlimited
frequency acquisition capability is presented. The proposed frequency detector (FD) is …

This article presents a novel method for frequency tracking based on an extended bang-
bang phase detector (XBBPD) in a referenceless clock and data recovery (CDR) circuit. The …

Continuous-rate referenceless clock and data recovery (CDR) circuits are capable of
operating over a wide range of data rates in multiple standards. To achieve wide-range …

This article reports a half-rate single-loop bang-bang clock and data recovery (BBCDR)
circuit without the need of reference and frequency detector (FD). Specifically, we propose a …

This article reports a single-loop full-rate bang-bang clock and data recovery (BBCDR)
circuit supporting a four-level pulse amplitude modulation (PAM-4) pattern. We eliminate …

This article presents design techniques for a continuous-rate reference-free clock and data
recovery (CDR) circuit employing a stochastic frequency–phase detector (SFPD). By taking …

This paper reports a reference-less frequency-detector-less single-loop bang-bang clock
and data recovery (BBCDR) circuit featuring wide frequency acquisition. We use a current …

This brief presents a design of fast frequency locking 320 Mb/s to 2.7 Gb/s continuous-rate
reference-less clock and data recovery (CDR) circuit. A simultaneous coarse/fine frequency …

A referenceless single-loop clock and data recovery (CDR) with a 6.4-11-Gb/s capture range
is presented. A dynamic bandwidth control (DBWC) technique for reducing the frequency …

This brief presents a wideband continuous-rate reference-less ring-oscillator-based PAM4
CDR. Our proposed frequency-detection-gain-enhanced phase/frequency detector (GE …