Islaris: verification of machine code against authoritative ISA semantics

M Sammler, A Hammond, R Lepigre… - Proceedings of the 43rd …, 2022 - dl.acm.org
Recent years have seen great advances towards verifying large-scale systems code.
However, these verifications are usually based on hand-written assembly or machine-code …

Rigorous engineering for hardware security: Formal modelling and proof in the CHERI design and implementation process

K Nienhuis, A Joannou, T Bauereiss… - … IEEE Symposium on …, 2020 - ieeexplore.ieee.org
The root causes of many security vulnerabilities include a pernicious combination of two
problems, often regarded as inescapable aspects of computing. First, the protection …

[PDF][PDF] Verified security for the Morello capability-enhanced prototype Arm architecture

T Bauereiss, B Campbell, T Sewell… - European …, 2022 - library.oapen.org
Memory safety bugs continue to be a major source of security vulnerabilities in our critical
infrastructure. The CHERI project has proposed extending conventional architectures with …

Formal verification of application and system programs based on a validated x86 ISA model

S Goel - 2016 - repositories.lib.utexas.edu
Two main kinds of tools available for formal software verification are point tools and general-
purpose tools. Point tools are targeted towards bug-hunting or proving a fixed set of …

Taming an authoritative Armv8 ISA specification: L3 validation and CakeML compiler verification

H Kanabar, ACJ Fox, MO Myreen - 13th International Conference …, 2022 - drops.dagstuhl.de
Abstract Machine-readable specifications for the Armv8 instruction set architecture have
become publicly available as part of Arm's release processes, providing an official and …

Automated and foundational verification of low-level programs

MJ Sammler - 2023 - publikationen.sulb.uni-saarland.de
Formal verification is a promising technique to ensure the reliability of low-level programs
like operating systems and hypervisors, since it can show the absence of whole classes of …

High-performance memory safety: optimizing the CHERI capability machine

AJP Joannou - 2019 - cl.cam.ac.uk
High-performance memory safety: optimizing the CHERI capability machine Page 1 Technical
Report Number 936 Computer Laboratory UCAM-CL-TR-936 ISSN 1476-2986 High-performance …

High-performance memory safety-Optimizing the CHERI capability machine

AJMP Joannou - 2018 - repository.cam.ac.uk
High-performance memory safety Optimizing the CHERI capability machine Alexandre Jean-Michel
Procopi Joannou University of Cambr Page 1 High-performance memory safety Optimizing the …

Verified compilation of a purely functional language to a realistic machine semantics

H Kanabar - 2024 - kar.kent.ac.uk
Formal verification of a compiler offers the ultimate understanding of the behaviour of
compiled code: a mathematical proof relates the semantics of each output program to that of …

Verified security properties for the capability-enhanced CHERI-MIPS architecture

K Nienhuis - 2022 - repository.cam.ac.uk
Despite decades of research, the computer industry still struggles to build secure systems.
The majority of security vulnerabilities are caused by a combination of two fundamental …