We present Rogue In-flight Data Load (RIDL), a new class of speculative unprivileged and
constrained attacks to leak arbitrary data across address spaces and privilege boundaries …

To stop side channel attacks on CPU caches that have allowed attackers to leak secret
information and break basic security mechanisms, the security community has developed a …

Speculative execution is an optimization technique that has been part of CPUs for over a
decade. It predicts the outcome and target of branch instructions to avoid stalling the …

Address space layout randomization (ASLR) is an important first line of defense against
memory corruption attacks and a building block for many modern countermeasures. Existing …

Last-Level Cache (LLC) attacks typically exploit timing side channels in hardware, and thus
rely heavily on timers for their operation. Many proposed defenses against such side …

Despite their in-DRAM Target Row Refresh (TRR) mitigations, some of the most recent
DDR4 modules are still vulnerable to many-sided Rowhammer bit flips. While these bit flips …

The MPEG-DASH streaming video standard contains an information leak: even if the stream
is encrypted, the segmentation prescribed by the standard causes content-dependent …

Website fingerprinting attacks use statistical analysis on network traffic to compromise user
privacy. The classical attack model used to evaluate website fingerprinting attacks assumes …

JavaScript-based timing attacks have been greatly explored over the last few years. They
rely on subtle timing differences to infer information that should not be available inside of the …

Dark silicon is pushing processor vendors to add more specialized units such as
accelerators to commodity processor chips. Unfortunately this is done without enough care …