A tutorial on multiplierless design of FIR filters: Algorithms and architectures

L Aksoy, P Flores, J Monteiro - Circuits, Systems, and Signal Processing, 2014 - Springer
Finite impulse response (FIR) filtering is a ubiquitous operation in digital signal processing
systems and is generally implemented in full custom circuits due to high-speed and low …

Design of digit-serial FIR filters: Algorithms, architectures, and a CAD tool

L Aksoy, C Lazzari, E Costa, P Flores… - IEEE transactions on …, 2012 - ieeexplore.ieee.org
In the last two decades, many efficient algorithms and architectures have been introduced
for the design of low-complexity bit-parallel multiple constant multiplications (MCM) …

Multiple real-constant multiplication with improved cost model and greedy and optimal searches

MB Gately, MB Yeary, CY Tang - 2012 IEEE International …, 2012 - ieeexplore.ieee.org
This paper formulates and solves a multiple real-constant multiplication (MRCM) problem,
where the goal is to find a multiplierless shift-add network that implements the multiplication …

Finding the optimal tradeoff between area and delay in multiple constant multiplications

L Aksoy, E Costa, P Flores, J Monteiro - Microprocessors and microsystems, 2011 - Elsevier
Over the years many efficient algorithms for the multiplierless design of multiple constant
multiplications (MCMs) have been introduced. These algorithms primarily focus on finding …

Multiplierless design of very large constant multiplications in cryptography

L Aksoy, DB Roy, M Imran, P Karl… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
This brief addresses the problem of implementing very large constant multiplications by a
single variable under the shift-adds architecture using a minimum number of …

Multiplierless design of folded DSP blocks

L Aksoy, P Flores, J Monteiro - ACM Transactions on Design Automation …, 2014 - dl.acm.org
This article addresses the problem of minimizing the implementation cost of the time-
multiplexed constant multiplication (TMCM) operation that realizes the multiplication of an …

Theoretical lower bounds for parallel pipelined shift-and-add constant multiplications with n-input arithmetic operators

MG Cruz Jiménez, U Meyer Baese… - EURASIP Journal on …, 2017 - Springer
New theoretical lower bounds for the number of operators needed in fixed-point constant
multiplication blocks are presented. The multipliers are constructed with the shift-and-add …

High-level algorithms for the optimization of gate-level area in digit-serial multiple constant multiplications

L Aksoy, C Lazzari, E Costa, P Flores, J Monteiro - Integration, 2012 - Elsevier
The last two decades have seen tremendous effort on the development of high-level
synthesis algorithms for efficient realization of the multiplication of a variable by a set of …

Optimal common sub-expression elimination algorithm of multiple constant multiplications with a logic depth constraint

YHA Ho, CU Lei, HK Kwan, N Wong - IEICE Transactions on …, 2008 - search.ieice.org
In the context of multiple constant multiplication (MCM) design, we propose a novel common
sub-expression elimination (CSE) algorithm that models the optimal synthesis of coefficients …

Framework for digital filter design optimization (DiFiDOT) using MCM based register minimization retiming for noise removal ECG filters

D Yagain - Journal of Signal Processing Systems, 2016 - Springer
In all the DSP (Digital Signal Processing) blocks such as digital filters, the filter coefficients
are known before hand. Hence, full flexibility of the multiplier is not necessary. Multiplierless …