All-optical quaternary logic based information processing: challenges and opportunities

JN Roy, T Chattopadhyay - Design and architectures for digital …, 2013 - books.google.com
Science and Technology is providing people all over the world with much better ways of
communicating than ever before, and the winds of change have whipped up the de‐-sire to …

Abstraction and approximation in fuzzy temporal logics and models

G Sotudeh, A Movaghar - Formal Aspects of Computing, 2015 - Springer
Recently, by defining suitable fuzzy temporal logics, temporal properties of dynamic systems
are specified during model checking process, yet a few numbers of fuzzy temporal logics …

Current-model CMOS sequential multiple-valued logic circuits

F Sarıca - 2012 - 193.140.201.98
The use of circuits with more than two logic levels, named as Multiple-Valued Logic (MVL)
circuits, have a potential for reducing chip area consumed by interconnection wiring and …

Quaternary BiCMOS logic circuits with high-impedance output state

Z Bundalo, D Bundalo, F Softić… - 2011 Proceedings of …, 2011 - ieeexplore.ieee.org
Principles and possibilities of synthesis and design of quaternary BiCMOS logic circuits with
high-impedance output state are considered, proposed and described in the paper. Two …

[PDF][PDF] Design and Implementation of a Multiple-Valued Logic FPGA Based on Convert–Coded-Collect (CCCI) Space Theory

HL SWADY, DR ZAGHAR - International Journal of Computer Science … - researchgate.net
ABSTRACT The Multiple-Valued Logic (MVL) is one of the keys to build the future logic
circuits. One of the most important logic units is Field Programming Gate Array (FPGA) …

Design of ternary Multiplexer and De-multiplexer circuit with optical nonlinear material (OPNLM) based switch

P Bhowmik, JN Roy, T Chattopadhyay - Optik, 2014 - Elsevier
Multiplexer and De-multiplexer operation play a very important role in all-optical
computation, communication and control. Considerable number of multiplexing–de …

Logic circuits with high-impedance output state for interconnection of ternary and binary CMOS digital circuits and systems

D Bundalo, Z Bundalo, F Softić… - 2012 Proceedings of …, 2012 - ieeexplore.ieee.org
Possibilities and principles for interconnection of CMOS ternary circuits and systems with
binary common buses in digital circuits and systems are considered and described in the …

Analog to digital signal converters for BiCMOS quaternary digital systems

D Bundalo, Z Bundalo, D Pašalić… - 2017 40th International …, 2017 - ieeexplore.ieee.org
Possibilities of practical development, design and implementation of analog signal to
quaternary digital signal converters for application in BiCMOS quaternary digital circuits and …

Synthesizable Quaternary logic blocks

D Borkute, PK Dakhole - 2016 International Conference on …, 2016 - ieeexplore.ieee.org
Quaternary logic offers representation of digits very minimalistically. Hardware required to
store, process such data is still a test. Combinational and sequential block are composed in …

Design of analog to digital converters for multiple-valued systems

D Bundalo, F Softie, D Pašalić… - 2015 4th …, 2015 - ieeexplore.ieee.org
Principles, methods and possibilities for design and implementation of CMOS parallel
analog to multiple-valued digital signal converters for multiple-valued (MV) digital systems …