IH-ViT: Vision Transformer-based Integrated Circuit Appear-ance Defect Detection

X Wang, S Gao, Y Zou, J Guo, C Wang - arXiv preprint arXiv:2302.04521, 2023 - arxiv.org
For the problems of low recognition rate and slow recognition speed of traditional detection
methods in IC appearance defect detection, we propose an IC appearance defect detection …

Efficient training for automatic defect classification by image augmentation

N Kondo, M Harada, Y Takagi - 2018 IEEE Winter Conference …, 2018 - ieeexplore.ieee.org
At semiconductor wafer production sites, an automatic defect classification (ADC) system is
used to analyze defects. The ADC system automatically classifies defect images into user …

Defect detection techniques robust to process variation in semiconductor inspection

M Harada, Y Minekawa… - Measurement Science and …, 2019 - iopscience.iop.org
The downscaling of device dimensions in semiconductor manufacturing has meant that
critical defect sizes have become smaller and smaller. This makes it more likely that the …

Quantifying the value of ownership of yield analysis technologies

C Weber, V Sankaran, KW Tobin… - IEEE transactions on …, 2002 - ieeexplore.ieee.org
A model based on information theory, which allows yield managers to determine an optimal
portfolio of yield analysis technologies for both the R&D and volume production …

Deep Learning-Based Integrated Circuit Surface Defect Detection: Addressing Information Density Imbalance for Industrial Application

X Wang, S Gao, J Guo, C Wang, L Xiong… - International Journal of …, 2024 - Springer
In this study, we aimed to address the primary challenges encountered in industrial
integrated circuit (IC) surface defect detection, particularly focusing on the imbalance in …

Wafer defect detection using directional morphological gradient techniques

G Qu, SL Wood, C Teh - EURASIP Journal on Advances in Signal …, 2002 - Springer
Accurate detection and classification of wafer defects constitute an important component of
the IC production process because together they can immediately improve the yield and …

Automatic recognition of circuit patterns on semiconductor wafers from multiple scanning electron microscope images

R Nakagaki, Y Takagi, K Nakamae - Measurement Science and …, 2010 - iopscience.iop.org
A technique is proposed for high-precision, automatic recognition of circuit patterns on a
semiconductor wafer from multiple scanning electron microscope (SEM) images. This …

Automatic defect classification in visual inspection of semiconductors using neural networks

K Kameyama, Y Kosugi, T Okahashi… - … on Information and …, 1998 - search.ieice.org
An automatic defect classification system (ADC) for use in visual inspection of
semiconductor wafers is introduced. The methods of extracting the defect features based on …

Deep Learning Based AOI System with Equivalent Convolutional Layers Transformed from Fully Connected Layers

YH Tsai, NY Lyu, SY Jung, KH Chang… - 2019 IEEE/ASME …, 2019 - ieeexplore.ieee.org
The rise of deep learning, especially in the realm of computer vision, paves ways of
leveraging automatic optical inspection systems to a higher level. Convolutional neural …

Using historical wafermap data for automated yield analysis

KW Tobin, TP Karnowski, SS Gleason… - Journal of Vacuum …, 1999 - pubs.aip.org
To be productive and profitable in a modern semiconductor fabrication environment, large
amounts of manufacturing data must be collected, analyzed, and maintained. This includes …