Methods are described for forming a flowable low-k dielec tric layer on a patterned substrate.
The film may be a silicon carbon-oxygen (Si-CO) layer in which the silicon and carbon …

5,110.407 5,212,119 5,271,972 5,279,784 5,364,488 5,393,708 5.426, 076 5.434, 109
5,468,687 5,485,420 5,530,293 5,547,703 5,558,717 5,578,532 5,587,014 5,593,741 …

Substrate processing systems are described that have a capacitively coupled plasma (CCP)
unit positioned inside a process chamber. The CCP unit may include a plasma excitation …

(57) ABSTRACT A method of closely interconnecting integrated circuits con tained within a
semiconductor wafer to electrical circuits Surrounding the semiconductor wafer. Electrical …

Substrate processing systems are described that have a capacitively coupled plasma (CCP)
unit positioned inside a process chamber. The CCP unit may include a plasma excitation …

A method for providing a highly reliable, low resistance interconnect comprises forming a
trench in a dielectric layer, forming a first liner in the trench then forming a resilient layer …

Systems and methods for molecular self-assembly are pro vided. The molecular self-
assembly receives a substrate that includes one or more regions of dielectric material. A …

A method of forming a dielectric layer is described. The method deposits a silicon-containing
film by chemical vapor deposition using a local plasma. The silicon-containing film is …

An integrated circuit structure having improved resistivity and a method for forming the same
are provided. The integrated circuit structure includes a dielectric layer, an opening in the …

An integrated circuit die stack including a first integrated circuit die mounted upon a
substrate, the first die including pass-through vias ('PTVs') composed of conductive …