Gate leakage current is expected to be the dominant leakage component in future technology generations. In this paper, we propose methods for steady-state gate leakage …
D Helms, E Schmidt, W Nebel - … Workshop on Power and Timing Modeling …, 2004 - Springer
In this tutorial, we give an introduction to the increasingly important effect of leakage in recent and upcoming technologies. The sources of leakage such as subthreshold leakage …
S Reda, AN Nowroz - Foundations and Trends® in Electronic …, 2012 - nowpublishers.com
In this survey we describe the main research directions in pre-silicon power modeling and post-silicon power characterization. We review techniques in power modeling and …
E Talpes, D Marculescu - … on Very Large Scale Integration (VLSI …, 2005 - ieeexplore.ieee.org
Enabled by the continuous advancement in fabrication technology, present-day synchronous microprocessors include more than 100 million transistors and have clock …
Converting a conventional contract into an electronic equivalent that can be executed and enforced by computers is a challenging task. The difficulties are caused by the ambiguities …
H Chang, SS Sapatnekar - ACM Transactions on Design Automation of …, 2007 - dl.acm.org
In this article, we present a method to analyze the total leakage current of a circuit under process variations, considering interdie and intradie variations as well as the effect of the …
D Marculescu, E Talpes - IEEE Micro, 2005 - ieeexplore.ieee.org
The authors present microarchitecture-level statistical models for characterizing process and system parameter variability, concentrating on gate length and on-chip temperature …
K Tseng, K Chou - US Patent 7,937,256, 2011 - Google Patents
This application claims priority of US Provisional Patent Application No. 60/868,334 filed on Dec. 2, 2006, entitled “A statistical library characterization method for the creation of …
D Helms, R Eilers, M Metzdorf… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
Leakage currents are one major concern when designing recent CMOS devices, making design for leakage at all stages of the design process mandatory. Early leakage optimization …