This tutorial surveys design methods for energy-efficient system-level design. We consider
electronic sytems consisting of a hardware platform and software layers. We consider the …

This paper contains a tutorial on bus-encoding techniques that target low power dissipation.
Three general classes of codes, ie, algebraic, permutation-based, and probability-based …

Power: a first-class architectural design constraint Page 1 0018-9162/01/$10.00 © 2001 IEEE 52
Computer Power: A First-Class Architectural Design Constraint Limiting power consumption …

Over the past decade, system-on-chip (SoC) designs have evolved to address the ever
increasing complexity of applications, fueled by the era of digital convergence …

Featuring contributions from major technology vendors, industry consortia, and government
and private research establishments, the Industrial Communication Technology Handbook …

In this paper we describe a new method for encoding data streams on system buses in order
to reduce bus line transition activity. Our focus is on data streams whose statistical …

Modern system-on-chip (SoC) design shows a clear trend toward integration of multiple
processor cores on a single chip. Designing a multiprocessor system-on-chip (MPSOC) …

We present a survey of the state-of-the-art techniques used in performing data and memory-
related optimizations in embedded systems. The optimizations are targeted directly or …

In the last few years, power dissipation has become an important design constraint, on par
with performance, in the design of new computer systems. Whereas in the past, the primary …

In the past, the major concern of the VLSI designers werearea, performance, cost, and
reliability. In recent years, however, this has changed and, increasingly, power is beinggiven …