Machine learning for electronic design automation: A survey

G Huang, J Hu, Y He, J Liu, M Ma, Z Shen… - ACM Transactions on …, 2021 - dl.acm.org
With the down-scaling of CMOS technology, the design complexity of very large-scale
integrated is increasing. Although the application of machine learning (ML) techniques in …

A survey on run-time power monitors at the edge

D Zoni, A Galimberti, W Fornaciari - ACM Computing Surveys, 2023 - dl.acm.org
Effectively managing energy and power consumption is crucial to the success of the design
of any computing system, helping mitigate the efficiency obstacles given by the downsizing …

Stream-dataflow acceleration

T Nowatzki, V Gangadhar, N Ardalani… - Proceedings of the 44th …, 2017 - dl.acm.org
Demand for low-power data processing hardware continues to rise inexorably. Existing
programmable and" general purpose" solutions (eg. SIMD, GPGPUs) are insufficient, as …

Co-designing accelerators and SoC interfaces using gem5-Aladdin

YS Shao, SL Xi, V Srinivasan, GY Wei… - 2016 49th Annual …, 2016 - ieeexplore.ieee.org
Increasing demand for power-efficient, high-performance computing has spurred a growing
number and diversity of hardware accelerators in mobile and server Systems on Chip …

Dsagen: Synthesizing programmable spatial accelerators

J Weng, S Liu, V Dadu, Z Wang, P Shah… - 2020 ACM/IEEE 47th …, 2020 - ieeexplore.ieee.org
Domain-specific hardware accelerators can provide orders of magnitude speedup and
energy efficiency over general purpose processors. However, they require extensive manual …

Accurate operation delay prediction for FPGA HLS using graph neural networks

E Ustun, C Deng, D Pal, Z Li, Z Zhang - Proceedings of the 39th …, 2020 - dl.acm.org
Modern heterogeneous FPGA architectures incorporate a variety of hardened blocks for
boosting the performance of arithmetic-intensive designs, such as DSP blocks and carry …

REVAMP: A systematic framework for heterogeneous CGRA realization

TK Bandara, D Wijerathne, T Mitra, LS Peh - Proceedings of the 27th …, 2022 - dl.acm.org
Coarse-Grained Reconfigurable Architectures (CGRAs) provide an excellent balance
between performance, energy efficiency, and flexibility. However, increasingly sophisticated …

CoNDA: Efficient cache coherence support for near-data accelerators

A Boroumand, S Ghose, M Patel, H Hassan… - Proceedings of the 46th …, 2019 - dl.acm.org
Specialized on-chip accelerators are widely used to improve the energy efficiency of
computing systems. Recent advances in memory technology have enabled near-data …

AutoDSE: Enabling software programmers to design efficient FPGA accelerators

A Sohrabizadeh, CH Yu, M Gao, J Cong - ACM Transactions on Design …, 2022 - dl.acm.org
Adopting FPGA as an accelerator in datacenters is becoming mainstream for customized
computing, but the fact that FPGAs are hard to program creates a steep learning curve for …

Rosetta: A realistic high-level synthesis benchmark suite for software programmable FPGAs

Y Zhou, U Gupta, S Dai, R Zhao, N Srivastava… - Proceedings of the …, 2018 - dl.acm.org
Modern high-level synthesis (HLS) tools greatly reduce the turn-around time of designing
and implementing complex FPGA-based accelerators. They also expose various …