Automatic debugging of real-time systems based on incremental satisfiability counting

S Andrei, WN Chin, AMK Cheng… - IEEE Transactions on …, 2006 - ieeexplore.ieee.org
Real-time logic (RTL) is useful for the verification of a safety assertion with respect to the
specification of a realtime system. Since the satisfiability problem for RTL is undecidable, the …

Efficient verification and optimization of real-time logic-specified systems

Ş Andrei, AMK Cheng - IEEE Transactions on Computers, 2009 - ieeexplore.ieee.org
Embedded and real-time systems are increasingly common and complex, requiring formal
specification and verification in order to guarantee their satisfaction of desirable safety and …

A rigorous methodology for specification and verification of business processes

C Masalagiu, WN Chin, Ş Andrei, V Alaiba - Formal Aspects of Computing, 2009 - Springer
Both specification and verification of business processes are gaining more and more
attention in the field. Most of the existing works in the last years are dealing with important …

Faster verification of RTL-specified systems via decomposition and constraint extension

S Andrei, AMK Cheng - 2006 27th IEEE International Real …, 2006 - ieeexplore.ieee.org
Embedded and real-time systems are increasingly common and complex, requiring formal
specification and verification in order to guarantee their satisfaction of desirable safety and …

Verifying linear real-time logic specifications

S Andrei, AMK Cheng - 28th IEEE International Real-Time …, 2007 - ieeexplore.ieee.org
Formal specification and verification are critical to the development of safe real-time and
embedded systems, which have become increasingly complex. Real-Time Logic (RTL) has …

Optimization of real-time systems timing specifications

S Andrei, AM Cheng - … on Embedded and Real-Time Computing …, 2006 - ieeexplore.ieee.org
Real-time logic (RTL) is useful for the verification of a safety assertion SA with respect to the
specification SP of a real-time system. Since the satisfiability problem for RTL is …

Systematic debugging of real-time systems based on incremental satisfiability counting

S Andrei, WN Chin, AMK Cheng… - 11th IEEE Real Time …, 2005 - ieeexplore.ieee.org
Real-time logic (RTL)(F. Jahanian et al., 1986, 1987, F. Wang et al., 1994) is useful for the
verification of a safety assertion with respect to the specification of a real-time system. Since …

A hierarchy of tractable subclasses for SAT and counting SAT problems

S Andrei, G Grigoras, M Rinard… - 2009 11th International …, 2009 - ieeexplore.ieee.org
Finding subclasses of formulae for which the SAT problem can be solved in polynomial time
has been an important problem in computer science. We present a new hierarchy of …

Optimizing automotive cyber-physical system specifications with multi-event dependencies

S Andrei, AMK Cheng - 2008 10th International Symposium on …, 2008 - ieeexplore.ieee.org
Cyberphysical systems are changing the way we interact with the physical world. The
correctness of many systems and devices in our modern society depends not only on the …

[PDF][PDF] Incremental Verification of Timing Constraints for Real-Time Systems

S ANDREI, WN CHIN, M RINARD - academia.edu
Testing constraints for real-time systems are usually verified through the satisfiability of
propositional formulae. In this paper, we propose an alternative where the verification of …