[HTML][HTML] Integrated Sensors for Electric Stimulation of Stem Cells: A Review on MicroElectrode Arrays (MEAs) Based Systems

A Algarín, D Martín, P Daza, G Huertas… - Sensors and Actuators …, 2024 - Elsevier
This paper provides an update on the sensors and actuators involved in Stem Cells (SC)
differentiation processes based on electric stimulation (STI), including both current and …

A 4-channel neural stimulation IC design with charge balancing and multiple current output modes

J Li, W Chen, X Liu, P Wan… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
This article proposes a neural stimulation integrated circuit design with multiple current
output modes. In the cathodic stimulation phase and anodic stimulation phase, each output …

A fully integrated, power-efficient, 0.07–2.08 mA, high-voltage neural stimulator in a standard CMOS process

D Palomeque-Mangut, Á Rodríguez-Vázquez… - Sensors, 2022 - mdpi.com
This paper presents a fully integrated high-voltage (HV) neural stimulator with on-chip HV
generation. It consists of a neural stimulator front-end that delivers stimulation currents up to …

A Spatially Diverse 2TX-3RX Galvanic-Coupled Transdural Telemetry for Tether-Less Distributed Brain-Computer Interfaces

C Shi, Y He, M Gourdouparis… - IEEE transactions on …, 2024 - ieeexplore.ieee.org
A near-field galvanic coupled transdural telemetry ASICs for intracortical brain-computer
interfaces is presented. The proposed design features a two channels transmitter and three …

A Fully Integrated Stimulator With High Stimulation Voltage Compliance Using Dynamic Bulk Biasing Technique in a Bulk CMOS Technology

Y Zhou, K Wang, S Yin, WY Li, F Meng… - … on Circuits and …, 2024 - ieeexplore.ieee.org
This paper presents a fully integrated stimulator using a dynamic bulk biasing technique and
a dynamic control scheme in a 180-nm bulk CMOS technology. Unlike the conventional bulk …

Energy-Efficient Power Management Interface with Adaptive HV Multimode Stimulation for Power-Sensor Integrated Patch-Type Systems

MW Kim, H Kim, M Song, JJ Kim - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
An energy-efficient power management interface (PMI) with adaptive high-voltage (HV)
stimulation capability is presented for patch-type healthcare devices where power …

A high-voltage fast-speed pulse generator with current-mode dead-time control comparator for shoot-through current suppression

YJ Jeon, RP Singh, MK Raja - IEEE Solid-State Circuits Letters, 2022 - ieeexplore.ieee.org
This letter presents a high-voltage fast-speed pulse generator with the suggested current-
mode dead-time control (DTC) comparator. Measurements show that the propagation delay …

Does Charge Balancing Ensure the Safety of the Electrical Stimulation and Is It Power Efficientƒ

R Ranjandish, G Kim - … Conference of the IEEE Engineering in …, 2023 - ieeexplore.ieee.org
Safety issues are the most important concern in electrical stimulation. Equating the charge in
the anodic and cathodic phases, namely charge balancing or charge equalizing, is a well …

A 4-channel neural stimulation IC design with charge balancing and exponential current output

J Li, X Liu, P Wan, Z Chen - 2022 IEEE Asia Pacific Conference …, 2022 - ieeexplore.ieee.org
This paper presents a 4-channel neural stimulation integrated circuit design with
exponential current output. Using exponentially decaying current output for neural …

A Charge Balanced Neural Stimulator Silicon Chip for Human-Machine Interface

X Liu, J Li, W Mao, Z Chen, Z Chen, P Wan… - Frontiers in …, 2021 - frontiersin.org
This paper proposes a neural stimulator silicon chip design with an improved charge
balancing technology. The proposed neural stimulation integrated circuit (IC) uses two …