Using spare capacity in solid state drives
DBC Vidyapoornachary, DM Daly… - US Patent 9,471,428, 2016 - Google Patents
BACKGROUND The present disclosure relates to computer memory, and more specifically,
to solid state drives (SSDs). SSDs are increasingly being used in modern computers, often …
to solid state drives (SSDs). SSDs are increasingly being used in modern computers, often …
Three dimensional (3D) memory including error detection circuitry
MA d'Abreu - US Patent 9,442,787, 2016 - Google Patents
A method performed at a non-volatile memory of a data storage device includes
determining, at error detection circuitry included in the non-volatile memory, an indication of …
determining, at error detection circuitry included in the non-volatile memory, an indication of …
Apparatus and methods for repairing memory devices including a plurality of memory die and an interface
M Ogasawara - US Patent 10,282,264, 2019 - Google Patents
See application file for complete search history.(56) References Cited US PATENT
DOCUMENTS* cited by examiner Primary Examiner—Mohammed A Bashar (74) Attorney …
DOCUMENTS* cited by examiner Primary Examiner—Mohammed A Bashar (74) Attorney …
Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules
FA Ware, E Tsern, JE Linstadt, TJ Giovannini… - US Patent …, 2019 - Google Patents
The embodiments described herein describe technologies of dynamic random access
memory (DRAM) components for high-performance, high-capacity registered memory mod …
memory (DRAM) components for high-performance, high-capacity registered memory mod …
Bank-level fault management in a memory system
TJ Dell, G Paulraj, DBC Vidyapoornachary - US Patent 9,600,189, 2017 - Google Patents
According to one aspect, bank-level fault management in a memory system is provided. The
memory system includes a plurality of ranks, each rank including a plurality of memory …
memory system includes a plurality of ranks, each rank including a plurality of memory …
Memory system and data control method
JC Chen, F Hara - US Patent 9,811,275, 2017 - Google Patents
US9811275B2 - Memory system and data control method - Google Patents US9811275B2 -
Memory system and data control method - Google Patents Memory system and data control …
Memory system and data control method - Google Patents Memory system and data control …
Read distribution in a three-dimensional stacked memory based on thermal profiles
DBC Vidyapoornachary, S Sethuraman… - US Patent …, 2017 - Google Patents
BACKGROUND The present disclosure relates to memory in computers, and more
specifically, to mirroring in three-dimensional stacked memory. As memory used in …
specifically, to mirroring in three-dimensional stacked memory. As memory used in …
Stack access control for memory device
T Shido - US Patent 10,304,505, 2019 - Google Patents
Apparatuses and methods including an interface die that interfaces with dice through
memory channels are described. An example apparatus includes a first die. The first die …
memory channels are described. An example apparatus includes a first die. The first die …
Mirroring in three-dimensional stacked memory
DBC Vidyapoornachary, S Sethuraman… - US Patent …, 2016 - Google Patents
BACKGROUND The present disclosure relates to memory in computers, and more
specifically, to mirroring in three-dimensional stacked memory. As memory used in …
specifically, to mirroring in three-dimensional stacked memory. As memory used in …
Data retrieval from stacked computer memory
S Chadha, HC Hunter, K Kim, A Saurabh… - US Patent …, 2016 - Google Patents
Data is retrieved from a stacked memory device having a plurality of slave memory chips in
response to recognizing a problem in the stacked memory device. The problem is …
response to recognizing a problem in the stacked memory device. The problem is …