A comprehensive review on microwave FinFET modeling for progressing beyond the state of art

G Crupi, DMMP Schreurs, JP Raskin, A Caddemi - Solid-State Electronics, 2013 - Elsevier
FinFET is a multiple-gate silicon transistor structure that nowadays is attracting an extensive
attention to progress further into the nanometer era by going beyond the downscaling limit of …

New substrate passivation method dedicated to HR SOI wafer fabrication with increased substrate resistivity

D Lederer, JP Raskin - IEEE Electron Device Letters, 2005 - ieeexplore.ieee.org
We propose in this letter a new passivation method to get rid of parasitic surface conduction
in oxidized high resistivity (HR) silicon and HR silicon-on-insulator (SOI) wafers. The method …

Surface-acoustic-wave devices based on lithium niobate and amorphous silicon thin films on a silicon substrate

Y Yang, L Gao, S Gong - IEEE Transactions on Microwave …, 2022 - ieeexplore.ieee.org
This work presents an acoustic platform using solidly mounted thin-oriented lithium niobate
(LiNbO3) film on silicon (Si). A thin layer of amorphous Si eliminates a conductive layer …

Exploring low-loss surface acoustic wave devices on heterogeneous substrates

J Wu, S Zhang, L Zhang, H Zhou… - IEEE Transactions …, 2022 - ieeexplore.ieee.org
This article presents shear horizontal surface acoustic wave (SH-SAW) devices with
excellent temperature stability and low loss on ultrathin Y42-cut lithium tantalate film on …

Advanced Surface Acoustic Wave Resonators on LiTaO₃/SiO₂/Sapphire Substrate

J Wu, S Zhang, Y Chen, P Zheng… - IEEE electron device …, 2022 - ieeexplore.ieee.org
The shear horizontal surface acoustic wave (SH-SAW) resonators with excellent quality
factor and temperature stability were fabricated on 42° YX-LiTaO3/SiO2/sapphire substrate …

RF harmonic distortion of CPW lines on HR-Si and trap-rich HR-Si substrates

CR Neve, JP Raskin - IEEE Transactions on Electron Devices, 2012 - ieeexplore.ieee.org
In this paper, the nonlinear behavior of coplanar waveguide (CPW) transmission lines
fabricated on Si and high-resistivity (HR) Si substrates is thoroughly investigated …

RF SOI CMOS technology on commercial trap-rich high resistivity SOI wafer

KB Ali, CR Neve, A Gharsallah… - 2012 IEEE International …, 2012 - ieeexplore.ieee.org
As CMOS technology continues to scale down, allowing operation in the GHz range, it
provides the opportunity of low cost integration of analog, digital and RF functions on the …

Ultra-fast perovskite electro-optic modulator and multi-band transmission up to 300 Gbit s−1

J Mao, F Uemura, SA Yazdani, Y Yin, H Sato… - Communications …, 2024 - nature.com
The gap between the performance of optoelectronic components and the demands of fiber-
optic communications has narrowed significantly in recent decades. Yet, the expansion of …

RF SOI switch FET design and modeling tradeoffs for GSM applications

S Parthasarathy, A Trivedi, S Sirohi… - … Conference on VLSI …, 2010 - ieeexplore.ieee.org
A single-pole double-throw novel switch device in0. 18¹m SOI complementary metal-oxide
semiconductor (CMOS) process is developed for 0.9 Ghz wireless GSMsystems. The layout …

The mechanistic determination of doping contrast from Fermi level pinned surfaces in the scanning electron microscope using energy-filtered imaging and calculated …

AKW Chee - Microscopy and Microanalysis, 2022 - academic.oup.com
Secondary electron (SE) doping contrast in the scanning electron microscope is correlated
with Fermi level pinned surfaces of Si samples prepared using HF-based wet-chemical …