ABC: An academic industrial-strength verification tool

R Brayton, A Mishchenko - … Conference, CAV 2010, Edinburgh, UK, July …, 2010 - Springer
ABC is a public-domain system for logic synthesis and formal verification of binary logic
circuits appearing in synchronous hardware designs. ABC combines scalable logic …

[图书][B] Electronic design automation: synthesis, verification, and test

LT Wang, YW Chang, KTT Cheng - 2009 - books.google.com
This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI
practitioners and researchers in need of fluency in an" adjacent" field will find this an …

The EPFL logic synthesis libraries

M Soeken, H Riener, W Haaswijk, E Testa… - arXiv preprint arXiv …, 2018 - arxiv.org
We present a collection of modular open source C++ libraries for the development of logic
synthesis applications. These libraries can be used to develop applications for the design of …

Exact synthesis of majority-inverter graphs and its applications

M Soeken, LG Amaru, PE Gaillardon… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
We propose effective algorithms for exact synthesis of Boolean logic networks using
satisfiability modulo theories (SMTs) solvers. Since exact synthesis is a difficult problem, it …

Armadillo: a compilation chain for privacy preserving applications

S Carpov, P Dubrulle, R Sirdey - … of the 3rd International Workshop on …, 2015 - dl.acm.org
In this work we present Armadillo a compilation chain used for compiling applications written
in a high-level language (C++) to work on encrypted data. The back-end of the compilation …

On-the-fly and DAG-aware: Rewriting Boolean networks with exact synthesis

H Riener, W Haaswijk, A Mishchenko… - … , Automation & Test …, 2019 - ieeexplore.ieee.org
The paper presents a generalization of DAG-aware AIG rewriting for k-feasible Boolean
networks, whose nodes are k-input lookup tables (k-LUTs). We introduce a high-effort DAG …

A novel basis for logic rewriting

W Haaswijk, M Soeken, L Amarú… - 2017 22nd Asia and …, 2017 - ieeexplore.ieee.org
Given a set of logic primitives and a Boolean function, exact synthesis finds the optimum
representation (eg, depth or size) of the function in terms of the primitives. Due to its high …

Scalable don't-care-based logic optimization and resynthesis

A Mishchenko, R Brayton, JHR Jiang… - ACM Transactions on …, 2011 - dl.acm.org
We describe an optimization method for combinational and sequential logic networks, with
emphasis on scalability. The proposed resynthesis (a) is capable of substantial logic …

Hyper-AP: Enhancing associative processing through a full-stack optimization

Y Zha, J Li - 2020 ACM/IEEE 47th Annual International …, 2020 - ieeexplore.ieee.org
Associative processing (AP) is a promising PIM paradigm that overcomes the von Neumann
bottleneck (memory wall) by virtue of a radically different execution model. By decomposing …

Pushing the communication barrier in secure computation using lookup tables

G Dessouky, F Koushanfar, AR Sadeghi… - Cryptology ePrint …, 2018 - eprint.iacr.org
Secure two-party computation has witnessed significant efficiency improvements in the
recent years. Current implementations of protocols with security against passive adversaries …