This survey provides an overview of the scientific literature on timing verification techniques
for multi-core real-time systems. It reviews the key results in the field from its origins around …

Multi-core platforms represent the answer of the industry to the increasing demand for
computational capabilities. From a real-time perspective, however, the inherent sharing of …

Recently, the research community has introduced several predictable dynamic random-
access memory (DRAM) controller designs that provide improved worst-case timing …

Efforts towards hosting safety-critical, real-time applications on multicore platforms have
been stymied by a problem dubbed the" one-out-of-m" problem: due to excessive analysis …

Architects of multicore chips for avionics must define and bound intercore interference,
which requires assuming a constant worst-case execution time for tasks executing on the …

We study the implementation of data-flow applications on multi-core processor with on-chip
shared multi-banked memory. Specifically, we consider the Kalray MPPA2 processor and …

All systems rely on inputs and outputs (I/Os) to perceive and interact with their surroundings.
In safety-critical systems, it is important to guarantee both the performance and time …

Parallel workloads are commonly modeled as directed acyclic graphs (DAGs). While DAG
scheduling is an important tool, it is plagued by capacity loss; it is not uncommon to see half …

Recent industrial trends favor the adoption of multi-core architectures for mixed-criticality
applications. Although several mixed-criticality multi-core scheduling approaches have been …

Efficiently exploiting multicore processors for real-time applications is challenging because
jobs that run concurrently on different cores can interfere on shared resources, severely …