Radiation effects in SiGe technology

JD Cressler - IEEE transactions on Nuclear Science, 2013 - ieeexplore.ieee.org
Silicon-Germanium (SiGe) technology effectively merges the desirable attributes of
conventional silicon-based CMOS manufacturing (high integration levels, at high yield and …

Analysis of location and LET dependence of single event transient in 14 nm SOI FinFET

B Liu, C Li, P Zhou, J Zhu - Nuclear Instruments and Methods in Physics …, 2022 - Elsevier
FinFET, with narrow silicon fin, and high k/metal gate stacked combined with SOI technology
brings benefits to radiation effects. Single event transient (SET) of SOI FinFET at 14 nm …

BiCMOS-based compensation: Toward fully curvature-corrected bandgap reference circuits

Y Huang, L Zhu, F Kong, C Cheung… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
We present a novel BiCMOS-based temperature compensation technique aiming at
complete correction of the curvature in the temperature response of bandgap references …

Single-event transient and total dose response of precision voltage reference circuits designed in a 90-nm SiGe BiCMOS technology

AS Cardoso, PS Chakraborty… - IEEE transactions on …, 2014 - ieeexplore.ieee.org
This paper presents an investigation of the impact of single-event transients (SETs) and total
ionization dose (TID) on precision voltage reference circuits designed in a fourth-generation …

ASET and TID characterization of a radiation hardened bandgap voltage reference in a 28-nm bulk CMOS technology

J Chen, Y Chi, B Liang, H Yuan, Y Wen… - … on Nuclear Science, 2022 - ieeexplore.ieee.org
Analog single-event transient (ASET) and total ionizing dose (TID) characterization of a
radiation-hardened bandgap voltage reference (BGR) is investigated in a 28-nm commercial …

Single event transients and pulse quenching effects in bandgap reference topologies for space applications

CM Andreou, A Javanainen, A Rominski… - … on Nuclear Science, 2016 - ieeexplore.ieee.org
An architectural performance comparison of bandgap voltage reference variants, designed
in a 0.18 μm CMOS process, is performed with respect to single event transients. These are …

Reconciling 3-D mixed-mode simulations and measured single-event transients in SiGe HBTs

M Turowski, JA Pellish, KA Moen… - … on Nuclear Science, 2010 - ieeexplore.ieee.org
Comprehensive 3-D mixed-mode simulations, including accurate modeling of parasitic
elements present in the experimental setup, resulted in close agreement between simulated …

Physics-based modeling of nonplanar nanodevices (FinFETs) and their response to radiation

M Turowski, A Raman, W Xiong - Proceedings of the 18th …, 2011 - ieeexplore.ieee.org
The paper presents details of our physics-based three-dimensional (3D) device modeling
coupled in mixed-mode with external load circuit and parasitics, which enabled accurate …

Establishing best-practice modeling approaches for understanding single-event transients in Gb/s SiGe digital logic

KA Moen, SD Phillips, EW Kenyon… - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
Single-event transient (SET) simulations of a Gb/s SiGe BiCMOS master/slave D flip-flop
circuit are performed, employing both a decoupled current-injection SET modeling …

A single-event transient hardened LDO regulator with built-in filter

Z Duan, Y Ding, C Lu, Z Zhao, J Hu… - IEICE Electronics …, 2015 - jstage.jst.go.jp
A single-event transient (SET) hardened LDO using novel structure is proposed to enhance
the single-event effect tolerance. The novel LDO with built-in filter can mitigate the response …