Flash-Cosmos: In-flash bulk bitwise operations using inherent computation capability of nand flash memory
Bulk bitwise operations, ie, bitwise operations on large bit vectors, are prevalent in a wide
range of important application domains, including databases, graph processing, genome …
range of important application domains, including databases, graph processing, genome …
MIMDRAM: An End-to-End Processing-Using-DRAM System for High-Throughput, Energy-Efficient and Programmer-Transparent Multiple-Instruction Multiple-Data …
Processing-using-DRAM (PUD) is a processing-in-memory (PIM) approach that uses a
DRAM array's massive internal parallelism to execute very-wide (eg, 16,384-262,144-bit …
DRAM array's massive internal parallelism to execute very-wide (eg, 16,384-262,144-bit …
MegIS: High-Performance, Energy-Efficient, and Low-Cost Metagenomic Analysis with In-Storage Processing
Metagenomics, the study of the genome sequences of diverse organisms in a common
environment, has led to significant advances in many fields. Since the species present in a …
environment, has led to significant advances in many fields. Since the species present in a …
3-D AND-type flash memory architecture with high-κ gate dielectric for high-density synaptic devices
Advanced 3-D synaptic devices with a stackable AND-type rounded dual channel (RDC)
flash memory structure are proposed for neuromorphic networks. AND synaptic arrays …
flash memory structure are proposed for neuromorphic networks. AND synaptic arrays …
Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis
We experimentally analyze the computational capability of commercial off-the-shelf (COTS)
DRAM chips and the robustness of these capabilities under various timing delays between …
DRAM chips and the robustness of these capabilities under various timing delays between …
Memory-Centric Computing: Recent Advances in Processing-in-DRAM
Memory-centric computing aims to enable computation capability in and near all places
where data is generated and stored. As such, it can greatly reduce the large negative …
where data is generated and stored. As such, it can greatly reduce the large negative …
A Mixed-Signal Quantized Neural Network Accelerator Using Flash Transistors
This paper presents a mixed-signal architecture for implementing Quantized Neural
Networks (QNNs) using flash transistors, to achieve extremely high throughput with …
Networks (QNNs) using flash transistors, to achieve extremely high throughput with …
Ares-Flash: Efficient Parallel Integer Arithmetic Operations Using NAND Flash Memory
In-Flash Processing (IFP) has been proposed in recent years to realize computation ability
inside NAND flash memory. Distinguished from processing-in-memory (PIM) and in-storage …
inside NAND flash memory. Distinguished from processing-in-memory (PIM) and in-storage …
MetaStore: High-Performance Metagenomic Analysis via In-Storage Computing
Metagenomics has led to significant advancements in many fields. Metagenomic analysis
commonly involves the key tasks of determining the species present in a sample and their …
commonly involves the key tasks of determining the species present in a sample and their …
Tcp-net: Minimizing operation counts of binarized neural network inference
Q Liu, J Gao, J Lai - 2021 IEEE International Symposium on …, 2021 - ieeexplore.ieee.org
Binarized neural network (BNN) dataflow inference accelerators have emerged as a
promising solution to be applied in cost-and power-restricted domains, such as loT and …
promising solution to be applied in cost-and power-restricted domains, such as loT and …