Impacts of front-end and middle-end process modifications on terrestrial soft error rate

P Roche, G Gasiot - IEEE Transactions on Device and Materials …, 2005 - ieeexplore.ieee.org
This paper reviews soft error rate (SER) mitigations with standard process modifications in
up-to-date commercial CMOS SRAMs and flip-flops. Acting in the front-end or middle-end …

Multi-bit error tolerant caches using two-dimensional error coding

J Kim, N Hardavellas, K Mai, B Falsafi… - 40th Annual IEEE/ACM …, 2007 - ieeexplore.ieee.org
In deep sub-micron ICs, growing amounts of on-die memory and scaling effects make
embedded memories increasingly vulnerable to reliability and yield problems. As scaling …

Cache and memory error detection, correction, and reduction techniques for terrestrial servers and workstations

CW Slayman - IEEE Transactions on Device and Materials …, 2005 - ieeexplore.ieee.org
As the size of the SRAM cache and DRAM memory grows in servers and workstations,
cosmic-ray errors are becoming a major concern for systems designers and end users …

[图书][B] Soft Errors: from particles to circuits

JL Autran, D Munteanu - 2017 - books.google.com
Soft errors are a multifaceted issue at the crossroads of applied physics and engineering
sciences. Soft errors are by nature multiscale and multiphysics problems that combine not …

Multi-scale, Multi-physics Modeling and Simulation of Single Event Effects in Digital Electronics: from Particles to Systems

JL Autran, D Munteanu - IEEE Transactions on Nuclear Science, 2023 - ieeexplore.ieee.org
This article aims to provide a survey of modeling and simulation of single-event effects
(SEEs) in digital electronics at device, circuit, and system levels. It primarily focuses on the …

An analytical model for soft error critical charge of nanometric SRAMs

SM Jahinuzzaman, M Sharifkhani… - IEEE Transactions on …, 2009 - ieeexplore.ieee.org
Scaling transistor size to the scale of the nanometer coupled with reduction of supply voltage
has made SRAMs more vulnerable to soft errors than ever before. The vulnerability has …

[图书][B] Terrestrial neutron-induced soft errors in advanced memory devices

T Nakamura - 2008 - books.google.com
There are numerous elaborate and comprehensive textbooks and guidelines on stroke.
However, busy clinicians are constantly bombarded with new knowledge for an infinite …

Comprehensive study of soft errors in advanced CMOS circuits with 90/130 nm technology

Y Tosaka, H Ehara, M Igeta, T Uemura… - IEDM Technical …, 2004 - ieeexplore.ieee.org
Characteristics of soft errors (SEs) in 90/130 nm CMOS circuits were comprehensively
investigated by high energy neutron-and alpha-accelerated tests. Process dependence on …

[HTML][HTML] An efficient common source sense amplifier for single ended SRAM

J Leavline, A Sugantha - Memories-Materials, Devices, Circuits and …, 2023 - Elsevier
Sense amplifiers (SA) play a vital role in supporting the read performance of static random-
access memory (SRAM). Single ended SRAM has attracted importance due to low leakage …

[HTML][HTML] An infrastructure for accurate characterization of single-event transients in digital circuits

VS Veeravalli, T Polzer, U Schmid, A Steininger… - Microprocessors and …, 2013 - Elsevier
We present the architecture and a detailed pre-fabrication analysis of a digital measurement
ASIC facilitating long-term irradiation experiments of basic asynchronous circuits, which also …