A fast integrated deblocking filter and sample-adaptive-offset parameter estimation architecture for HEVC
A Singhadia, M Minhazuddin, M Mamillapalli… - Microprocessors and …, 2021 - Elsevier
Low power hardware acceleration cores for integration into real-time High Efficiency Video
Coding (HEVC) codec for smartphones, tablets, camcorders, and televisions are in great …
Coding (HEVC) codec for smartphones, tablets, camcorders, and televisions are in great …
A high throughput hardware architecture for deblocking filter in HEVC
This paper presents a high throughput hardware architecture for deblocking filter in high
efficiency video coding (H. 265/HEVC) standard. The architecture uses an efficient hybrid …
efficiency video coding (H. 265/HEVC) standard. The architecture uses an efficient hybrid …
FPGA implementations of HEVC inverse DCT using high-level synthesis
E Kalali, I Hamzaoglu - … on Design and Architectures for Signal …, 2015 - ieeexplore.ieee.org
High Efficiency Video Coding (HEVC), the recently developed international video
compression standard, has 50% better video compression efficiency than H. 264 video …
compression standard, has 50% better video compression efficiency than H. 264 video …
Design of streaming deblocking filter for HEVC decoder
R Peesapati, S Das, S Baldev… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
This paper presents a hardware architecture using mixed pipelined and parallel processing
for Deblocking Filter (DBF) in High Efficiency Video Coding (HEVC) standard. The objective …
for Deblocking Filter (DBF) in High Efficiency Video Coding (HEVC) standard. The objective …
Design and implementation of efficient streaming deblocking and sao filter for hevc decoder
This paper aims to design an efficient mixed serial five-stage pipeline processing hardware
architecture of deblocking filter (DBF) and sample adaptive offset (SAO) filter for high …
architecture of deblocking filter (DBF) and sample adaptive offset (SAO) filter for high …
A dual-clock VLSI design of H. 265 sample adaptive offset estimation for 8k ultra-HD TV encoding
Sample adaptive offset (SAO) is a newly introduced in-loop filtering component in H.
265/High Efficiency Video Coding (HEVC). While SAO contributes to a notable coding …
265/High Efficiency Video Coding (HEVC). While SAO contributes to a notable coding …
Modern video coding: Methods, challenges and systems
RCN Palau, BS da Cunha Silveira… - Journal of Integrated …, 2021 - jics.org.br
With the increasing demand for digital video applications in our daily lives, video coding and
decoding become critical tasks that must be supported by several types of devices and …
decoding become critical tasks that must be supported by several types of devices and …
A directional and scalable streaming deblocking filter hardware architecture for HEVC decoder
S Baldev, PK Rathore, R Peesapati… - Microprocessors and …, 2021 - Elsevier
In this work, a directional streaming hardware architecture for Deblocking Filter (DBF) of
High-Efficiency Video Coding (HEVC) decoder is presented. The architecture uses adaptive …
High-Efficiency Video Coding (HEVC) decoder is presented. The architecture uses adaptive …
An uhd 4k@ 60fps deblocking filter hardware targeting the av1 decoder
E Zummach, R Palau, J Goebel… - 2020 27th IEEE …, 2020 - ieeexplore.ieee.org
This paper presents a hardware design for the Deblocking Filter (DBF) in the AOM Video 1
(AV1) decoder. The DBF is the first filter of the AV1 encoding loop, being used to attenuate …
(AV1) decoder. The DBF is the first filter of the AV1 encoding loop, being used to attenuate …
Hardware Efficient Integrated In-loop Filter for HEVC Encoder
L Poola, AP - IETE Journal of Research, 2024 - Taylor & Francis
The deblocking filter (DF) and the sample adaptive offset (SAO) filter, which aids in
enhancing the subjective quality of the image, make up the in-loop filter of the high-efficiency …
enhancing the subjective quality of the image, make up the in-loop filter of the high-efficiency …