Information Science and Digital Technology form an immensely complex and wide subject
that extends from social implications of technological development to deep mathematical …

Register Transfer Level (RTL) code optimization is crucial for enhancing the efficiency and
performance of digital circuits during early synthesis stages. Currently, optimization relies …

The problem of transformation of a Mealy finite-state machine (FSM) into an equivalent
Moore FSM is considered. This problem often arises in the practice of engineering design …

The problem of minimization of Moore finite-state machines (FSMs) is considered. This
problem often arises in designing digital devices based on programmable logic devices. The …

In this paper, the realization of low power finite state machines (FSMs) on FPGAs using
decomposition techniques is addressed. The original FSM is divided into two submachines …

In this paper we address the issue of low power realization of FSMs using decomposition
and gated clock architecture. We decompose the N state machine into two interacting …

Internet protocol (IP) address lookup is one of the major performance bottlenecks in high-
end routers. This paper presents an architecture for an IP address lookup engine based on …

In this paper, we study the bi-decomposition of automata in two standard ways. With semi-
tensor product, the matrix-based expression of automata is given and then the …

In this paper, some problems that arise in the realization of finite state machines (FSM) are
shown to be strongly related to the theory of submodular functions. Specifically, we use the …

The methods are proposed targeting to reduce the numbers of both look-up table elements
and embedded memory blocks in the logic circuit of a Moore finite state machine. The …