A review of III-V Tunnel Field Effect Transistors for future ultra low power digital/analog applications
M Saravanan, E Parthasarathy - Microelectronics Journal, 2021 - Elsevier
Abstract Tunnel Field Effect Transistors (TFETs) have emerged as serious contenders for the
replacement of traditional MOSFET technology for the future ultra low power Analog/Digital …
replacement of traditional MOSFET technology for the future ultra low power Analog/Digital …
[PDF][PDF] Hf-Based High-κ Dielectrics: A Review.
Silicon oxide has been utilized as gate dielectric material for over 40 years [1]. However,
progressive minimization of transistor dimensions requires the gate oxide layers with very …
progressive minimization of transistor dimensions requires the gate oxide layers with very …
Analysis of nanometer-scale InGaAs/InAs/InGaAs composite channel MOSFETs using high-K dielectrics for high speed applications
The outstanding electron transport properties of InGaAs and InAs semiconductor materials,
makes them attractive candidates for future nano-scale CMOS. In this paper, the ON state …
makes them attractive candidates for future nano-scale CMOS. In this paper, the ON state …
Performance analysis of metal gate engineered junctionless nanosheet fet with a ft/fmax of 224/342ghz for beyond 5g (b5g) applications
This manuscript for the first time investigates the effect of Dual Metal on Gate Junctionless
Nanosheet FET (DMG-JL-NSFET) for analog/RF applications. The entire analysis is …
Nanosheet FET (DMG-JL-NSFET) for analog/RF applications. The entire analysis is …
Novel dual-metal junctionless nanotube field-effect transistors for improved analog and low-noise applications
A Goel, S Rewari, S Verma, RS Gupta - Journal of Electronic Materials, 2021 - Springer
Dual-metal junctionless nanotube field-effect transistors (DMJN-TFETs) for improvised
analog and digital applications are described. It has been realized that, compared with …
analog and digital applications are described. It has been realized that, compared with …
Design and analysis of high k silicon nanotube tunnel FET device
A new tubular field effect transistor (FET) device named silicon nanotube tunnel field effect
transistor (Si‐NTTFET) has been proposed which is emerged out of structural engineering …
transistor (Si‐NTTFET) has been proposed which is emerged out of structural engineering …
Carrier Modulation in 2D Transistors by Inserting Interfacial Dielectric Layer for Area‐Efficient Computation
Z Bian, J Miao, T Zhang, H Chen, Q Zhu, J Chai, F Tian… - Small, 2023 - Wiley Online Library
Abstract 2D materials with atomic thickness display strong gate controllability and emerge as
promising materials to build area‐efficient electronic circuits. However, achieving the …
promising materials to build area‐efficient electronic circuits. However, achieving the …
2-D-Nonlinear electrothermal model for investigating the self-heating effect in GAAFET transistors
M Belkhiria, F Echouchene, N Jaba… - … on Electron Devices, 2021 - ieeexplore.ieee.org
The objective of the present study is to analyze the heat transfer in the gate-all-around (GAA)
MOSFETs based on the Cattaneo and Vernotte (CV) model due to the finite heat …
MOSFETs based on the Cattaneo and Vernotte (CV) model due to the finite heat …
20 nm high performance enhancement mode InP HEMT with heavily doped S/D regions for future THz applications
The DC and RF performance of L g= 20 nm enhancement mode (E-Mode) In 0.7 Ga 0.3
As/InAs/In 0.7 Ga 0.3 As composite channel high electron mobility transistor (HEMT) on InP …
As/InAs/In 0.7 Ga 0.3 As composite channel high electron mobility transistor (HEMT) on InP …
Impact of leakage current in germanium channel based DMDG TFET using drain-gate underlap technique
In this work, a dual metal (DM) double-gate (DG) Tunnel Field Effect Transistor (DMDG-
TFET) with drain-gate underlap is proposed to overcome the challenges in conventional …
TFET) with drain-gate underlap is proposed to overcome the challenges in conventional …