Highly stable short channel ultrathin atomic layer deposited indium zinc oxide thin film transistors with excellent electrical characteristics
YK Liang, WL Li, JY Zheng, YL Lin… - IEEE Electron …, 2023 - ieeexplore.ieee.org
The high-performance atomic layer deposited (ALD) ultrathin (~ 2 nm) amorphous InZnO (-
IZO, indium: Zinc≈ 6: 4) channel thin-film transistors (TFTs) with a short channel length () of …
IZO, indium: Zinc≈ 6: 4) channel thin-film transistors (TFTs) with a short channel length () of …
Superior High-Temperature Electrical Characteristics of ALD Ultrathin In2O3 Transistors
T Gao, P Hong, K Hu, X Miao, Y He… - IEEE Electron Device …, 2024 - ieeexplore.ieee.org
In this work, we report an effective method to improve the high-temperature reliability of
atomic-layer-deposited (ALD) ultrathin (3 nm) indium oxide (In2O transistors. A high field …
atomic-layer-deposited (ALD) ultrathin (3 nm) indium oxide (In2O transistors. A high field …
Top-Gate Indium-Tin-Oxide Power Transistors Featuring High Breakdown Voltage of 156 V
In this letter, a top-gate (TG) indium-tin-oxide (ITO) power field-effect transistor (FET) with
offset design is reported for the first time and carefully investigated by both simulations and …
offset design is reported for the first time and carefully investigated by both simulations and …
First Demonstration of Top-Gate Enhancement-Mode ALD In2O3 FETs with High Thermal Budget of 600 °C for DRAM Applications
In this work, for the first time, we report top-gate In 2 O 3 FETs with enhancement-mode (E-
mode) operation and a high thermal budget of C, being compatible with dynamic random …
mode) operation and a high thermal budget of C, being compatible with dynamic random …
First Experimental Demonstration of 3D-Stacked 2T0C DRAM Cells Based on Indium Tin Oxide Channel
In this letter, we provide the first experimental demonstration of 3D-stacked 2T0C DRAM
cells based on indium tin oxide (ITO) FETs. The 3D sequential integration process steps …
cells based on indium tin oxide (ITO) FETs. The 3D sequential integration process steps …
Surface Accumulation Induced Negative Schottky Barrier and Ultralow Contact Resistance in Atomic-Layer-Deposited InO Thin-Film Transistors
As transistor dimensions reach the 3-nm node, interface and surface engineering emerges
as critical considerations. Challenges introduced by reduced conductivity and mobility due …
as critical considerations. Challenges introduced by reduced conductivity and mobility due …
Record-Low Metal to Semiconductor Contact Resistance in Atomic-Layer-Deposited In2O3 TFTs Reaching the Quantum Limit
In this work, we demonstrate the record-low metal-to-semiconductor contact resistance R c=
23.4 Ω μm at n 2D= 5.0× 10 13 cm− 2 (reaching the quantum limit) in atomic-layer-deposited …
23.4 Ω μm at n 2D= 5.0× 10 13 cm− 2 (reaching the quantum limit) in atomic-layer-deposited …
First Demonstration of Top-Gate Indium-Tin-Oxide RF Transistors with Record High Cut-off Frequency of 48 GHz, Id of 2.32 mA/μm and gm of 900 μS/μm on SiC …
We have provided the first demonstration of high-performance top-gate indium-tin-oxide
(ITO) radio-frequency (RF) transistors. The top-gate ITO transistors on SiC substrate with …
(ITO) radio-frequency (RF) transistors. The top-gate ITO transistors on SiC substrate with …
Novel ultra-low voltage and high-speed programming/erasing schemes for SONOS Flash memory with excellent data retention
A novel cell operation scheme featuring low voltage, high speed, and excellent data
retention has been proposed for SONOS flash memory. First, in 1bit/cell operation, program …
retention has been proposed for SONOS flash memory. First, in 1bit/cell operation, program …