Three-dimensional integrated circuits (3-D IC) technology has emerged in the past few
decades, driven in part by the techno-economic difficulties of dimensional scaling and the …

In this article, we will present recent advances in reliability effects such as electromigration
on interconnects and Negative/Positive Bias Temperature Instability (N/P BTI) effects on …

In this paper, we present a novel and fast electromigration (EM) immortality check for
general multisegment interconnect wires. Instead of using current density as the key …

Vertically integrated circuits (3-D ICs) may revitalize Moore's law scaling which has slowed
down in recent years. 3-D stacking is an emerging technology that stacks multiple dies …

In the last five decades, the number of transistors on a chip has increased exponentially in
accordance with the Moore's law, and the semiconductor industry has followed this law as …

As VLSI technology features are pushed to the limit with every generation and with the
introduction of new materials and increased current densities to satisfy the performance …

Electrical characteristics and reliability of the wafer-on-wafer (WOW) bumpless through-
silicon via (TSV) structure are investigated, and the new lumped circuit model is proposed to …

In the millimeter wave (mmW) frequency range, the root mean square height of the through
silicon via (TSV) sidewall roughness is comparable to the skin depth, and hence, becomes a …

We have investigated the debonding failure of the through-silicon via (TSV)–Cu/Si interface
during annealing treatment at 425° C. The interface microstructure was characterized by two …

Thermally induced residual stresses across the TSV-Cu/TiW/SiO 2/Si interface in through‑
silicon vias (TSVs) have raised serious concerns about mechanical and electrical reliability …