The past and future of multi-gate field-effect transistors: Process challenges and reliability issues

Y Sun, X Yu, R Zhang, B Chen… - Journal of …, 2021 - iopscience.iop.org
This work reviews the state-of-the art multi-gate field-effect transistor (MuGFET) process
technologies and compares the device performance and reliability characteristics of the …

Analytical modeling of transient electromigration stress based on boundary reflections

MA Al Shohel, VA Chhabria… - 2021 IEEE/ACM …, 2021 - ieeexplore.ieee.org
Traditional methods that test for electromigration (EM) failure in multisegment interconnects,
over the lifespan of an IC, are based on the use of the Blech criterion, followed by Black's …

On-Chip Heater Design and Control Methodology for Reliability Testing Applications Requiring Over 300° C Local Temperatures

H Yu, YH Yi, N Pande, CH Kim - IEEE Transactions on Device …, 2023 - ieeexplore.ieee.org
This paper presents the design details and control methodologies for on-chip heaters that
can provide fast and accurate local temperature control for reliability testing applications …

System-level simulation of electromigration in a 3 nm cmos power delivery network: The effect of grid redundancy, metallization stack and standard-cell currents

H Zahedmanesh, I Ciofi, O Zografos… - 2022 IEEE …, 2022 - ieeexplore.ieee.org
A physics-based system-level electromigration (EM) modelling platform is employed to
simulate EM and its impact on the IR drop from the supply voltage to the standard-cells for a …

[HTML][HTML] Electromigration in Nano-Interconnects: Determining Reliability Margins in Redundant Mesh Networks Using a Scalable Physical–Statistical Hybrid Paradigm

H Zahedmanesh - Micromachines, 2024 - mdpi.com
This paper presents a hybrid modelling approach that combines physics-based
electromigration modelling (PEM) and statistical methods to evaluate the electromigration …

A Novel System-Level Physics-Based Electromigration Modelling Framework: Application to the Power Delivery Network

H Zahedmanesh, I Ciofi, O Zografos… - 2021 ACM/IEEE …, 2021 - ieeexplore.ieee.org
Electromigration has been a major reliability concern for nano-interconnects in CMOS
applications. With further CMOS miniaturization, the cross-sectional area of nano …

A pragmatic network-aware paradigm for system-level electromigration predictions at scale

H Zahedmanesh, P Roussel, I Ciofi… - 2023 IEEE International …, 2023 - ieeexplore.ieee.org
The standard approach for electro migration (EM) compliance checks of CMOS systems is
based on failure statistics from EM tests on single isolated interconnects. Thus, when …

High-Throughput Addressable Test Structure Design for Nano-Scaled CMOS Device Characterization

X Wang, D Wang, L Guo, P Ren… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
Device random variations become a critical issue with continuous downscaling, which
require extensive characterization with affordable area and time cost. In this work, a high …

A 16nm all-digital hardware monitor for evaluating electromigration effects in signal interconnects through bit-error-rate tracking

N Pande, C Zhou, MH Lin, R Fung… - … on Device and …, 2022 - ieeexplore.ieee.org
The impact of Electromigration (EM) on the Bit-Error-Rate (BER) of signal interconnect paths
was experimentally examined. An array-based test-vehicle for tracking Bit-Error-Rate (BER) …

Studying the Impact of Temperature Gradient on Electromigration Lifetime Using a Power Grid Test Structure with On-Chip Heaters

YH Yi, C Kim, C Zhou, A Kteyan… - 2023 IEEE International …, 2023 - ieeexplore.ieee.org
This work presents statistical data collected from 38 power grid test structures showing the
detailed impact of temperature gradient on electro migration (EM) lifetime. The failure time …