(60) Provisional application No. 60/462,170, filed on Apr. as a lead frame incorporating a
large thermally-conductive 11, 2003, provisional application No. 60/449,673, plate and …

5.444, 296 A 8/1995 Kaul et al. 6,835,598 B2* 12/2004 Baek et al..................... 438/109
5,495,398 A 2, 1996 Takiar et al. 6,838,761 B2 1/2005 KarneZos 5,550,711 A 8, 1996 Burns …

(57) ABSTRACT A semiconductor package Subassembly includes a die affixed to, and
electrically interconnected with, a die attach side of a first package substrate, and a second …

(63) Contmuatlon-m-part of appl1cat1on No. 10/210,160, Krumholz & Memlik, LLp? led on
Aug. 1, 2002, noW Pat. No. 6,856,007, and a continuation-in-part of application No …

Packaged microelectronic elements are provided. In an exem plary embodiment, a
microelectronic element having a front face and a plurality of peripheral edges bounding the …

In the ongoing search for higher levels of circuit integra tion to Support system level
requirements, many avenues have been explored. In particular, chip feature sizes have …

Semiconductor assemblies include a first package, each hav ing at least one die affixed to,
and electrically interconnected with, a die attach side of the first package Substrate, and a …

A packaged semiconductor chip includes features such as a chip carrier having a large
thermal conductor which can be solder-bonded to a circuit board so as to provide enhanced …

A stacked semiconductor package including a plurality of stacked semiconductor devices on
a substrate, and a method of forming the same. The semiconductor devices are stacked in …

(57) ABSTRACT A method of forming a semiconductor package comprises forming one or
more first vias in a first side of a substrate and attaching a first side of a first microelectronic …