This report addresses some of our observations made in a dozen of projects in the area of
software testing, and more specifically, in automated testing. It documents, analyzes and …

Over the years, the fundamentals of VLSI technology have evolved to include a wide range
of topics and a broad range of practices. To encompass such a vast amount of knowledge …

One of the biggest challenges in chip and system design is determining whether the
hardware works correctly. That is the job of functional verification engineers and they are the …

Constrained random simulation is the main workhorse in today's hardware verification flows.
It requires the random generation of input stimuli that obey a set of declaratively specified …

In this paper, we demonstrate a method for generation of assembler test programs that
systematically probe the micro architecture of a PowerPC superscalar processor. We show …

This paper describes μ GP, an evolutionary approach for generating assembly programs
tuned for a specific microprocessor. The approach is based on three clearly separated …

Constraining and input biasing are frequently used techniques in functional verification
methodologies based on randomized simulation generation. Constraints confine the …

In this paper, we present a verification methodology that integrates formal verification
techniques with verification by simulation, thereby providing means for generating …

Although decimal arithmetic is widely used in commercial and financial applications, the
related computations are handled in software. As a result, applications that use decimal data …

We describe the results in validating the performance projections from a parameterized trace-
driven simulation model of a speculative out-of-order superscalar processor which has been …