A Fully Differential 4-Bit Analog Compute-In-Memory Architecture for Inference Application
D Kushwaha, R Kohli, J Mishra… - 2023 IEEE 5th …, 2023 - ieeexplore.ieee.org
A robust, fully differential multiplication and accumulate (MAC) scheme for analog compute-
in-memory (CIM) architecture is proposed in this article. The proposed method achieves a …
in-memory (CIM) architecture is proposed in this article. The proposed method achieves a …
SRAM-Based Hybrid Analog Compute-In-memory Architecture to Enhance the Signal Margin
D Kushwaha, RV Joshi, S Dasgupta… - … Symposium on Circuits …, 2024 - ieeexplore.ieee.org
This manuscript proposes an SRAM-based hybrid analog compute-in-memory (CIM)
architecture to enhance the signal margin. This hybrid architecture presents fully differential …
architecture to enhance the signal margin. This hybrid architecture presents fully differential …
Time-Domain-Based Non-volatile In-Memory Computing Architecture Using FeFETs for Binary Neural Network
This paper presents an energy-efficient 128 * 64 In-Memory Computing (IMC) macro using a
novel 5T-2FeFET bit-cell for Binary Neural Networks. This work combines the non-volatile …
novel 5T-2FeFET bit-cell for Binary Neural Networks. This work combines the non-volatile …
An Energy-Efficient Time Domain Based Compute In-Memory Architecture for Binary Neural Network
This paper presents an energy-efficient time domain-based compute in-memory architecture
to accelerate the deep neural networks (DNNs). This work focuses on improving the energy …
to accelerate the deep neural networks (DNNs). This work focuses on improving the energy …
Variation-Aware Design Methodology for SRAM-Based Multi-Bit Analog Compute-in-Memory Architecture
D Kushwaha, RV Joshi, A Bulusu… - 2024 22nd IEEE …, 2024 - ieeexplore.ieee.org
Analog compute-in-memory (CIM) architectures are energy-efficient solutions for artificial
intelligence (AI) edge processors. The high-precision analog CIM architectures are sensitive …
intelligence (AI) edge processors. The high-precision analog CIM architectures are sensitive …
An Energy-Efficient SRAM-Based Charge Domain Compute In-Memory Architecture
A Singla, D Kushwaha, G Aman… - 2024 22nd IEEE …, 2024 - ieeexplore.ieee.org
This paper presents an energy-efficient and low-latency approach for performing a large
number of Multiply and Accumulate (MAC) operations in Deep Neural Networks (DNNs) …
number of Multiply and Accumulate (MAC) operations in Deep Neural Networks (DNNs) …
A 2-bit Multiplication Operation using Si-SiGe-Si Channel FinFET 8T-SRAM Cell
The Compute-in-memory (CIM) architecture has been offered as an emerging solution to the
Von-Neumann computing architecture's memory wall. The CIM design embeds functionality …
Von-Neumann computing architecture's memory wall. The CIM design embeds functionality …
An Area and Energy-Efficient SRAM Based Time-Domain Compute-In-Memory Architecture For BNN
In this paper, we present an area and energy efficient SRAM based time-domain compute-in-
memory (TDCIM) architecture to accelerate binary neural networks (BNNs). We have …
memory (TDCIM) architecture to accelerate binary neural networks (BNNs). We have …
An Energy Efficient C-2C Charge-Sharing Based Analog Compute-In-Memory Architecture
D Kushwaha, R Kohli, J Mishra, J Singh… - 2023 IEEE Asia …, 2023 - ieeexplore.ieee.org
SRAM-based analog compute-in-memory (CIM) architecture has gained more attention due
to its high energy efficiency. A C-2C charge sharing-based robust, scalable, and energy …
to its high energy efficiency. A C-2C charge sharing-based robust, scalable, and energy …