Specifically, based on the observation that a response is always preceded by a request in
multi-processor SoCs, this letter proposes a novel deadlock-free XY-YX router for on-chip …

Reliability of a Network-on-Chip (NoC) relies vastly upon the efficiency of handling faults.
Faults those lead to trouble during on-chip communication process are basically of two types …

The saturation of design complexity and clock frequencies for single-core processors has
resulted in the emergence of multicore architectures as an alternative design paradigm …

CMP (Chip Multiprocessor) based architectures have offered a promising solution in
tomorrow's high performance computing demands. Topology and routing policy are playing …

As chip density increases rapidly with every process generation, the use of Network-on-Chip
(NoC) has become the prevalent architecture for SoC, MPSoC, and, large scale CMP (Chip …

With the rapid increase in the chip density, Network-on-Chip (NoC) is becoming the
prevalent architecture for today's complex chip multi processor (CMP) based systems. One …

Accepted: 18/Aug/2018, Published: 30/Sept./2018 Abstract—Network on Chip (NoC) is an
interconnection network, which provides a network architecture to overcome limitations of …

Performance of NoC relies heavily on underlying interconnect network and related message
forwarding technique. Here, Mesh is an obvious network choice by the designer due to its …

In multicore embedded system power and performance of system are major concern. The
design of network architecture and routing algorithm mainly determines the performance of …

Congestion is an important parameter that confines the performance of the network. Routing
algorithm decides the possible path between source and destination. Performance of routing …