Implementing efficient all solutions SAT solvers

T Toda, T Soh - Journal of Experimental Algorithmics (JEA), 2016 - dl.acm.org
All solutions SAT (AllSAT for short) is a variant of the propositional satisfiability problem.
AllSAT has been relatively unexplored compared to other variants despite its significance …

A two-variable model for SAT-based ATPG

H Chen, J Marques-Silva - IEEE Transactions on Computer …, 2013 - ieeexplore.ieee.org
Automatic test pattern generation (ATPG) is one of the first applications that motivated the
development of modern Boolean satisfiability (SAT). It is now widely accepted that ATPG is …

Reduced ordered binary decision diagram with implied literals: A new knowledge compilation approach

Y Lai, D Liu, S Wang - Knowledge and Information Systems, 2013 - Springer
Reduced ordered binary decision diagram (ROBDD) is one of the most influential
knowledge compilation languages. We generalize it by associating some implied literals …

TG-Pro: a SAT-based ATPG system

H Chen, J Marques-Silva - Journal on Satisfiability, Boolean …, 2012 - content.iospress.com
Abstract Automatic Test Pattern Generation (ATPG) is arguably one of the practical
applications that motivated the development of modern Boolean Satisfiability (SAT) solvers …

Accurate QBF-based test pattern generation in presence of unknown values

D Erb, MA Kochte, S Reimer, M Sauer… - … on Computer-Aided …, 2015 - ieeexplore.ieee.org
Unknown (X) values emerge during the design process as well as during system operation
and test application. X-sources are for instance black boxes in design models, clock-domain …

[PDF][PDF] Applying advanced SAT-based techniques to circuit testing

J Burchard - 2018 - freidok.uni-freiburg.de
In integrierten Schaltungen ist das Auftreten von Herstellungsdefekten eher Regel als
Ausnahme. Dies wird durch das kontinuierliche Schrumpfen der Strukturgrößen und das …

Evaluating the effectiveness of D-chains in SAT-based ATPG

J Burchard, F Neubauer, P Raiola… - 2017 18th IEEE Latin …, 2017 - ieeexplore.ieee.org
With the ever increasing size of today's Very-Large-Scale-Integration (VLSI) designs new
approaches for test pattern generation become more and more popular. One of the best …

Evaluating the Effectiveness of D-chains in SAT-based ATPG and Diagnostic TPG

P Raiola, J Burchard, F Neubauer, D Erb… - Journal of Electronic …, 2017 - Springer
The ever increasing size and complexity of today's Very-Large-Scale-Integration (VLSI)
designs requires a thorough investigation of new approaches for the generation of test …

Uma análise sobre a eficiência de geradores automáticos de padrões de teste híbridos

GS Porto - 2018 - bdtd.ibict.br
O processo de teste de circuitos integrados tem grande importância para detectar possíveis
erros gerados por sistemas digitais, especialmente quando se trata de aplicações críticas …

[引用][C] Faculty of Information Technology Department of Digital Design

M Chloupek - 2016 - … A dissertation thesis submitted to the …