Energy efficient stepwise charging of a capacitor using a DC-DC converter with consecutive changes of its duty ratio

S Nakata, H Makino, J Hosokawa… - … on Circuits and …, 2014 - ieeexplore.ieee.org
Energy storage technology is becoming more and more important in today's environmentally
conscious society. In the conventional method of directly charging a capacitor under a …

General stability of stepwise waveform of an adiabatic charge recycling circuit with any circuit topology

S Nakata, R Honda, H Makino, S Mutoh… - … on Circuits and …, 2012 - ieeexplore.ieee.org
The stability of a stepwise waveform of an adiabatic charge recycling circuit with tank
capacitors is investigated. We propose a new tank capacitor circuit with two-string capacitor …

Cryogenic Alternative: CMOS Versus Dynamic-Based Logic

AH Hassan, P Gupta, S Pamarti… - 2024 IEEE 67th …, 2024 - ieeexplore.ieee.org
Next-generation data-center computing requires high-performance energy-efficient servers.
One counterintuitive approach to reduce energy is to lower the temperature of the …

Interface circuits for multiphase piezoelectric energy harvesters

NJ Guilar, PJ Hurst, R Amirtharajah… - 2008 Twenty-Third …, 2008 - ieeexplore.ieee.org
This paper describes interface circuits for a multiphase disk-shaped piezoelectric generator.
By using quarter-circle shaped electrodes, similar to an ultrasonic motor, multiple output …

Design of Low-Power Transceiver for Memory Interface

박정훈 - 2023 - s-space.snu.ac.kr
This thesis presents design techniques for low-power transceivers for memory interfaces. In
terms of two trends to improve the bandwidth of the memory interface, fast-and-narrow and …

PNS-FCR: Flexible charge recycling dynamic circuit technique for low-power microprocessors

J Wang, N Gong, EG Friedman - IEEE Transactions on Very …, 2015 - ieeexplore.ieee.org
Due to the superior speed and area characteristics, dynamic circuits are widely applied in
data paths and other time critical components in modern microprocessors. The high …

Power gating and its repercussions—a review

P Verma, A Noor, AK Sharma - 2016 IEEE 1st International …, 2016 - ieeexplore.ieee.org
In this paper, Power gating/Multithreshold technique for low power circuit design is
summarized and compared. Few important and vital parameters such as sizing of sleep …

Design of dynamic digital circuits with n-channel multiple-input floating-gate transistors

G Hang, X Zhou, X Hu - 2014 IEEE 12th international …, 2014 - ieeexplore.ieee.org
Dynamic circuits using n-channel multiple-input floating-gate MOS (FGMOS) transistors to
realize binary and ternary logic are presented. In binary domino circuits, the n-channel …

NORA circuit design using neuron-MOS transistors

G Hang, X Zhou, Y Yang… - 2014 10th International …, 2014 - ieeexplore.ieee.org
A No Race (NORA) dynamic logic using neuron-MOS transistor is presented. The circuit is
designed using the n-channel neuron-MOS transistor instead of the nMOS logic block or …

MITH-Dyn: A multi Vth dynamic logic design style using mixed mode FinFETs

R Nair, R Vemuri - 2014 27th IEEE International System-on …, 2014 - ieeexplore.ieee.org
In FinFETs, the back-gate of the transistor can be biased to control its V th, thereby reducing
leakage power at the expense of performance. This paper proposes a novel multi V th …