Considerations for ultimate CMOS scaling
KJ Kuhn - IEEE transactions on Electron Devices, 2012 - ieeexplore.ieee.org
This review paper explores considerations for ultimate CMOS transistor scaling. Transistor
architectures such as extremely thin silicon-on-insulator and FinFET (and related …
architectures such as extremely thin silicon-on-insulator and FinFET (and related …
Si–Ge–Sn alloys: From growth to applications
In this review article, we address key material parameters as well as the fabrication and
application of crystalline GeSn binary and SiGeSn ternary alloys. Here, the transition from an …
application of crystalline GeSn binary and SiGeSn ternary alloys. Here, the transition from an …
Semiconductor nanowires: to grow or not to grow?
PC McIntyre, AF i Morral - Materials Today Nano, 2020 - Elsevier
Semiconductor nanowires have demonstrated exciting properties for nanophotonics,
sensors, energy technologies, and end-of-roadmap and beyond-roadmap electronic …
sensors, energy technologies, and end-of-roadmap and beyond-roadmap electronic …
Ge0.95Sn0.05 Gate-All-Around p-Channel Metal-Oxide-Semiconductor Field-Effect Transistors with Sub-3 nm Nanowire Width
We demonstrate Ge0. 95Sn0. 05 p-channel gate-all-around field-effect transistors (p-
GAAFETs) with sub-3 nm nanowire width (W NW) on a GeSn-on-insulator (GeSnOI) …
GAAFETs) with sub-3 nm nanowire width (W NW) on a GeSn-on-insulator (GeSnOI) …
7-nm FinFET CMOS design enabled by stress engineering using Si, Ge, and Sn
S Gupta, V Moroz, L Smith, Q Lu… - IEEE transactions on …, 2014 - ieeexplore.ieee.org
Bandgap and stress engineering using group IV materials-Si, Ge, and Sn, and their alloys
are employed to design a FinFET-based CMOS solution for the 7-nm technology node and …
are employed to design a FinFET-based CMOS solution for the 7-nm technology node and …
Germanium–Tin (GeSn) p-Channel MOSFETs Fabricated on (100) and (111) Surface Orientations With Sub-400 Passivation
In this letter, we report the first study of the dependence of carrier mobility and drive current I
Dsat of Ge 0.958 Sn 0.042 p-channel metal-oxide-semiconductor field-effect transistors …
Dsat of Ge 0.958 Sn 0.042 p-channel metal-oxide-semiconductor field-effect transistors …
Material characterization of high Sn-content, compressively-strained GeSn epitaxial films after rapid thermal processing
We report on the characterization of high Sn-content (∼ 10% Sn) GeSn films grown on (001)
Ge/Si substrates using reduced-pressure chemical vapor deposition. Pseudomorphic 30nm …
Ge/Si substrates using reduced-pressure chemical vapor deposition. Pseudomorphic 30nm …
Hole Mobility Enhancement in Compressively Strained pMOSFETs
S Gupta, YC Huang, Y Kim, E Sanchez… - IEEE electron device …, 2013 - ieeexplore.ieee.org
Germanium tin (GeSn) pMOSFETs with channel Sn composition of 7% are fabricated using
a low thermal budget process. GeSn pMOSFETs show enhancement in hole mobility over …
a low thermal budget process. GeSn pMOSFETs show enhancement in hole mobility over …
Observation of field emission from GeSn nanoparticles epitaxially grown on silicon nanopillar arrays
We apply molecular beam epitaxy to grow GeSn-nanoparticles on top of Si-nanopillars
patterned onto p-type Si wafers. We use x-ray photoelectron spectroscopy to confirm a …
patterned onto p-type Si wafers. We use x-ray photoelectron spectroscopy to confirm a …
Germanium-tin on Si avalanche photodiode: device design and technology demonstration
We report the demonstration of a Ge 0.95 Sn 0.05 on silicon (Ge 0.95 Sn 0.05/Si) avalanche
photodiode (APD) having a separate-absorption-charge-multiplication structure, wherein a …
photodiode (APD) having a separate-absorption-charge-multiplication structure, wherein a …