Systems and methods for improved semiconductor etching and component protection

TF Tan, LK Loh, D Lubomirsky, J Soonwook… - US Patent …, 2019 - Google Patents
Semiconductor systems and methods may include a semiconductor processing chamber
having a gas box defining an access to the semiconductor processing chamber. The …

Systems and methods for improved semiconductor etching and component protection

TF Tan, LK Loh, D Lubomirsky, J Soonwook… - US Patent …, 2019 - Google Patents
Semiconductor systems and methods may include a semi conductor processing chamber
having a gas box defining an access to the semiconductor processing chamber. The cham …

Methods and systems to enhance process uniformity

S Singh, A Tso, J Zhang, Z Li, H Zhang… - US Patent …, 2023 - Google Patents
3, 969077 4006047 4, 190488 4.209. 357 4,214,946 4, 232060 4.234. 628 4,265.943
4,340,462 4,341,592 4,361,418 4,364,803 4,368.223 4, 374698 4,381,441 4,397,812 …

Dual-channel showerhead with improved profile

D Lubomirsky - US Patent 10,546,729, 2020 - Google Patents
Described processing chambers may include a chamber housing at least partially defining
an interior region of the semiconductor processing chamber. The chambers may include a …

Low temperature gas-phase carbon removal

CM Hsu, NK Ingle, H Hamana, A Wang - US Patent 9,378,969, 2016 - Google Patents
(57) ABSTRACT A methodofetching carbon films on patterned heterogeneous structures is
described and includes a gas phase etch using remote plasma excitation. The remote …

Semiconductor processing systems having multiple plasma configurations

D Lubomirsky, X Chen, S Venkataraman - US Patent 10,256,079, 2019 - Google Patents
An exemplary system may include a chamber configured to contain a semiconductor
substrate in a processing region of the chamber. The system may include a first remote …

Three-dimensional memory device containing bonded memory die and peripheral logic die and method of making thereof

A Nishida - US Patent 10,283,493, 2019 - Google Patents
A first die includes a three-dimensional memory device and first copper pads. A second die
includes a peripheral logic circuitry containing CMOS devices located on the semiconductor …

Three-dimensional memory device having support-die-assisted source power distribution and method of making thereof

KH Kim, M Higashitani, F Toyama… - US Patent 10,510,738, 2019 - Google Patents
2019-01-15 Assigned to SANDISK TECHNOLOGIES LLC reassignment SANDISK
TECHNOLOGIES LLC ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR …

Highly selective doped oxide removal method

C Zhijun, Z Li, NK Ingle, A Wang… - US Patent …, 2016 - Google Patents
(57) ABSTRACT A method of etching doped silicon oxide on patterned hetero geneous
structures is described and includes a gas phase etch using partial remote plasma …

Air gap process

SD Nemani, T Koshizawa - US Patent 9,385,028, 2016 - Google Patents
Methods are described for forming “air gaps” between adjacent metal lines on patterned
substrates. The common name “air gap” will be used interchangeably with the more …