HERMES-Core—A 1.59-TOPS/mm2 PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs

R Khaddam-Aljameh, M Stanisavljevic… - IEEE Journal of Solid …, 2022 - ieeexplore.ieee.org
We present a 256 256 in-memory compute (IMC) core designed and fabricated in 14-nm
CMOS technology with backend-integrated multi-level phase change memory (PCM). It …

29.1 A 40nm 64Kb 56.67 TOPS/W read-disturb-tolerant compute-in-memory/digital RRAM macro with active-feedback-based read and in-situ write verification

JH Yoon, M Chang, WS Khwa, YD Chih… - … Solid-State Circuits …, 2021 - ieeexplore.ieee.org
As memory-centric workloads (AI, graph-analytics) continue to gain momentum, technology
solutions that provide higher on-die memory capacity/bandwidth can provide scalability …

A 40-nm, 64-kb, 56.67 TOPS/W voltage-sensing computing-in-memory/digital RRAM macro supporting iterative write with verification and online read-disturb detection

JH Yoon, M Chang, WS Khwa, YD Chih… - IEEE Journal of Solid …, 2021 - ieeexplore.ieee.org
Computing-in-memory (CIM) architectures have gained importance in achieving high-
throughput energy-efficient artificial intelligence (AI) systems. Resistive RAM (RRAM) is a …

A 40-nm 118.44-TOPS/W voltage-sensing compute-in-memory RRAM macro with write verification and multi-bit encoding

JH Yoon, M Chang, WS Khwa, YD Chih… - IEEE Journal of Solid …, 2022 - ieeexplore.ieee.org
Computing-in-memory (CIM) architectures have paved the way for energy-efficient artificial
intelligence (AI) systems while outperforming von Neumann architectures. In particular …

A practical design-space analysis of compute-in-memory with SRAM

S Spetalnick, A Raychowdhury - IEEE Transactions on Circuits …, 2022 - ieeexplore.ieee.org
Analog-domain compute-in-memory (CIM) is a technique that has emerged in part as a
response to the memory-intensive vector-matrix-multiplications (VMMs) required to …

Cim-secded: A 40nm 64kb compute in-memory rram macro with ecc enabling reliable operation

B Crafton, S Spetalnick, JH Yoon, W Wu… - 2021 IEEE Asian …, 2021 - ieeexplore.ieee.org
Resistive RAM (RRAM) is a promising candidate for compute in-memory (CIM) applications
owing to its natural multiply-and-accumulate structure in a 1T-1R bitcell, high-bit density, non …

Layout-Aware Area Optimization of Transposable STT-MRAM for a Processing-In-Memory System

S Choi, D Han, C Choi, Y Seo - IEEE Transactions on Very …, 2023 - ieeexplore.ieee.org
This article presents a layout-aware area optimization methodology for transposable spin-
transfer torque magnetic random access memory (STT-MRAM). Although transposable STT …

One-Transistor-Multiple-RRAM Cells for Energy-Efficient In-Memory Computing

M Uhlmann, EPB Quesada, M Fritscher… - 2023 21st IEEE …, 2023 - ieeexplore.ieee.org
The use of resistive random-access memory (RRAM) for in-memory computing (IMC)
architectures has significantly improved the energy-efficiency of artificial neural networks …

Hardware-algorithm co-design enabling efficient event-based object detection

B Crafton, A Paredes, E Gebhardt… - 2021 IEEE 3rd …, 2021 - ieeexplore.ieee.org
Event-based cameras are a promising alternative to traditional optical cameras for real time
computer vision systems. They offer low power, high temporal resolution, and high dynamic …

Statistical optimization of compute in-memory performance under device variation

B Crafton, S Spetalnick, JH Yoon… - 2021 IEEE/ACM …, 2021 - ieeexplore.ieee.org
Compute in-memory (CIM) is a promising technique that minimizes data transport,
maximizes memory throughput, and performs computation on the bitline of memory sub …