An efficient hardware supported and parallelization architecture for intelligent systems to overcome speculative overheads

S Kumar, SK Singh, N Aggarwal… - … Journal of Intelligent …, 2022 - Wiley Online Library
In the last few decades, technology advancements have paved the way for the creation of
intelligent and autonomous systems that utilize complex calculations which are both time …

Intermediate representations in imperative compilers: A survey

J Stanier, D Watson - ACM Computing Surveys (CSUR), 2013 - dl.acm.org
Compilers commonly translate an input program into an intermediate representation (IR)
before optimizing it and generating code. Over time there have been a number of different …

Register allocation by puzzle solving

FM Quintão Pereira, J Palsberg - Proceedings of the 29th ACM SIGPLAN …, 2008 - dl.acm.org
We show that register allocation can be viewed as solving a collection of puzzles. We model
the register file as a puzzle board and the program variables as puzzle pieces; pre-coloring …

Instruction selection

GH Blindell - Principles, Methods, and Applications, 2016 - Springer
Like most doctoral students, I started my studies by reviewing the existing, most prominent
approaches in the field. A couple of months later I thought I had acquired a sufficient …

Synthesizing an instruction selection rule library from semantic specifications

S Buchwald, A Fried, S Hack - … of the 2018 International Symposium on …, 2018 - dl.acm.org
Instruction selection is the part of a compiler that transforms intermediate representation (IR)
code into machine code. Instruction selectors build on a library of hundreds if not thousands …

nelli: a lightweight frontend for MLIR

M Levental, A Kamatar, R Chard, K Chard… - arXiv preprint arXiv …, 2023 - arxiv.org
Multi-Level Intermediate Representation (MLIR) is a novel compiler infrastructure that aims
to provide modular and extensible components to facilitate building domain specific …

Near-optimal instruction selection on dags

DR Koes, SC Goldstein - Proceedings of the 6th annual IEEE/ACM …, 2008 - dl.acm.org
Instruction selection is a key component of code generation. High quality instruction
selection is of particular importance in the embedded space where complex instruction sets …

Efficient directed acyclic graph pattern matching to enable code partitioning and execution on heterogeneous processor cores

D Dhurjati, M Kim, CA Vick - US Patent 9,201,659, 2015 - Google Patents
BACKGROUND Mobile electronic devices (eg, cellular phones, watches, headphones,
remote controls, etc.) have become more com plex than ever, and now commonly include …

Instruction selection by graph transformation

S Buchwald, A Zwinkau - … of the 2010 international conference on …, 2010 - dl.acm.org
Common generated instruction selections are based on tree pattern matching, but modern
and custom architectures feature instructions, which cannot be covered by trees. To …

Modeling universal instruction selection

G Hjort Blindell, R Castañeda Lozano… - Principles and Practice …, 2015 - Springer
Instruction selection implements a program under compilation by selecting processor
instructions and has tremendous impact on the performance of the code generated by a …