Straight to the point: Intra-and intercluster LUT connections to mitigate the delay of programmable routing

S Nikolić, G Zgheib, P Ienne - Proceedings of the 2020 ACM/SIGDA …, 2020 - dl.acm.org
Technology scaling makes metal delay ever more problematic, but routing between Look-Up
Tables (LUTs) still passes through a series of transistors. It seems wise to avoid the …

Fast modulo 2n−1 and 2n;1 adder using carry-chain on FPGA

LS Didier, L Jaulmes - 2013 Asilomar Conference on Signals …, 2013 - ieeexplore.ieee.org
Modular addition is a widely used operation in Residue Number System applications.
Specific sets of moduli allow fast RNS operations such as binary conversions and …

Contributions to computer arithmetic and applications to embedded systems

N Brunie - 2014 - theses.hal.science
In the last decades embedded systems have been challenged with more and more
application variety, each time more constrained. This implies an ever growing need for …

Automating the Design of Programmable Interconnect for Reconfigurable Architectures

S Nikolic - 2023 - infoscience.epfl.ch
With Moore's law coming to an end, increasingly more hope is being put in specialized
hardware implemented on reconfigurable architectures such as Field-Programmable Gate …

Enhanced technology mapping for FPGAs with exploration of cell configurations

G Zgheib, I Ouaiss - Journal of Circuits, Systems and Computers, 2015 - World Scientific
In the state-of-the-art field-programmable gate arrays (FPGAs), logic circuits are synthesized
and mapped on clusters of look-up tables. However, arithmetic operations benefit from an …

[PDF][PDF] Contribution à l'arithmétique des ordinateurs et applications aux systèmes embarqués

MN BRUNIE - 2014 - theses.hal.science
Among the operations required by the IEEE standard, four are used more frequently than the
others: addition, subtraction, multiplication and fused-multiply and add. Those operations …

Enhanced technology mapping for FPGAs with exploration of cell configurations.(c2011)

GJ Zgheib - 2011 - laur.lau.edu.lb
In the state of the art Field-Programmable Gate Arrays (FPGAs), logic circuits are
synthesized and mapped on clusters of look-up tables. However, when additions need to be …