Maintaining power consumption has become a critical hurdle in the manufacturing process
as CMOS technologies continue to be downscaled. The longevity of portable gadgets is …

Static random access memory (SRAM) is an important component of embedded cache
memory of handheld digital devices. SRAM has become major data storage device due to its …

The main goal of this paper is to build an 8 by 8-bit SRAM memory array using 45nm CMOS
technology. The SRAM array is read by a 3-bit address using a 3-to-8 decoder. The SRAM …

This research presents a meticulous comparative analysis of Static Random-Access Memory
(SRAM) cells, the design is carried out at 45nm, 90nm, and 180nm semiconductor …

As the technology node is shrinking from micron to sub-micron and to deep sub-micron, the
device size of semiconductor components is getting smaller and smaller to achieve greater …

High speed and low power consumption have been the primary issue to design Static
Random Access Memory (SRAM), but we are facing new challenges with the scaling of …

The most research on the power consumption of 6T SRAM has been focused on the static
power dissipation and the power dissipated by the leakage current. On the other hand, as …

SRAM cells are widely used as cache memory in most of the devices now a days. Design of
SRAM with low power and high efficiency has been a difficult task which is continuously …

There is requirement for a higher noise tolerant and low power static random access
memory (SRAM) in today's market. A stable 8 transistors SRAM (8T SRAM) cell is presented …

The Static Random Access Memory (SRAM) is very essential memory device for storing the
data on chip. The SRAM takes a large fraction of total power therefore low power SRAM …