M Fooladi, A Kamran - Journal of Electronic Testing, 2020 - Springer
Deterministic test generation methods are time consuming and, this has led to emergence of simulation-based approaches. The basis of simulation-based methods is to propose a …
In this paper, we present an efficient formal approach to check the equivalence of synthesized RTL against the high-level specification in the presence of pipelining …
M Moradi, J Denil - … 2020: proceedings of the 8th SEDES …, 2021 - repository.uantwerpen.be
Validation and verification of modern safety-critical systems demand an increasing amount of time and effort as systems become more complicated. Fault Injection (FI) is a well-known …
Simulation is the most widely used form of validation using billions of random and pseudo- random tests in the traditional design flow. A critical problem in post-silicon debug is to …
B Kumar, M Fujita, V Singh - Journal of Electronic Testing, 2019 - Springer
Silicon debugging of integrated circuits is exacerbated by the lack of golden responses, highly restricted observability and irreproducible nature of bugs. Debug engineers need to …
Due to tremendous growth in the complexity of modern designs, bugs inevitably escape the pre-silicon verification stage because of incomplete functional verification. Furthermore …
As semiconductor manufacturing progresses to smaller process nodes, it is becoming increasingly difficult to climb the yield learning curve rapidly. The rate of yield learning …
Verification is the procedure to check if there is a discrepancy between a design and its specification. Debugging target is to find the location of the observed error (s). Correction …