Configurable accelerator framework including a stream switch having a plurality of unidirectional stream links
US11562115B2 - Configurable accelerator framework including a stream switch having a plurality
of unidirectional stream links - Google Patents US11562115B2 - Configurable accelerator …
of unidirectional stream links - Google Patents US11562115B2 - Configurable accelerator …
Acceleration unit for a deep learning engine
Embodiments of a device include an integrated circuit, a reconfigurable stream switch
formed in the integrated circuit along with a plurality of convolution accelerators and an …
formed in the integrated circuit along with a plurality of convolution accelerators and an …
Tensor-based computing system for quaternion operations
ML Martinez-Canales, SK Singh, V Sharma… - US Patent …, 2022 - Google Patents
(57) ABSTRACT A machine-learning system includes a quaternion (QT) computation
engine. Input data to the QT computation engine includes quaternion values, each …
engine. Input data to the QT computation engine includes quaternion values, each …
Fakecatcher: detection of synthetic portrait videos using biological signals
Detection of synthetic content in portrait videos, eg, deep fakes, is achieved. Detectors
blindly utilizing deep learning are not effective in catching fake content, as generative …
blindly utilizing deep learning are not effective in catching fake content, as generative …
Generative adversarial networks for generating physical design layout patterns
J Sha, MA Guillorn, M Burkhardt, DN Dunn - US Patent 10,699,055, 2020 - Google Patents
A method for generating physical design layout patterns includes selecting as training data a
set of physical design layout patterns of features in a given layer of a given patterned …
set of physical design layout patterns of features in a given layer of a given patterned …
Circuit arrangements and methods for performing multiply-and-accumulate operations
(57) ABSTRACT A and a request generator circuit is configured to read data elements of a
three-dimensional (3-D) input feature map (IFM) from a memory and store a subset of the …
three-dimensional (3-D) input feature map (IFM) from a memory and store a subset of the …
Tool to create a reconfigurable interconnect framework
US11675943B2 - Tool to create a reconfigurable interconnect framework - Google Patents
US11675943B2 - Tool to create a reconfigurable interconnect framework - Google Patents …
US11675943B2 - Tool to create a reconfigurable interconnect framework - Google Patents …
Generative adversarial networks for generating physical design layout patterns of integrated multi-layers
J Sha, MA Guillorn, M Burkhardt, DN Dunn - US Patent 10,706,200, 2020 - Google Patents
A method for generating physical design layout patterns includes selecting as training data
one or more physical design layout patterns of integrated multi-layers for features in at least …
one or more physical design layout patterns of integrated multi-layers for features in at least …
Coordinates-based generative adversarial networks for generating synthetic physical design layout patterns
J Sha, MA Guillorn, DN Dunn - US Patent 10,606,975, 2020 - Google Patents
(57) ABSTRACT A method for generating physical design layout patterns includes the step
of selecting one or more physical design layouts, a given physical design layout comprising …
of selecting one or more physical design layouts, a given physical design layout comprising …