Insights into architectural spurs in high performance fractional-N frequency synthesizers
A fractional-N frequency synthesizer inherently exhibits spurs by virtue of the fact that its
output frequency is not an integer multiple of its reference frequency. Until recently, it …
output frequency is not an integer multiple of its reference frequency. Until recently, it …
A 10-GHz Digital-PLL-Based Chirp Generator With Parabolic Non-Uniform Digital Predistortion for FMCW Radars
This article describes a 10-GHz chirp generator for frequency-modulated continuous-wave
(FMCW) radars, that is based on a digital PLL (DPLL) with a two-point injection of the …
(FMCW) radars, that is based on a digital PLL (DPLL) with a two-point injection of the …
A Low-Noise Fractional- Digital PLL Using a Resistor-Based Inverse-Constant-Slope DTC
This work presents a digital-to-time converter (DTC)-based fractional-phase-locked loop
(PLL) achieving low jitter and low spurs. Thanks to the proposed resistor-based inverse …
(PLL) achieving low jitter and low spurs. Thanks to the proposed resistor-based inverse …
A Low-Jitter Fractional- Digital PLL Adopting a Reverse-Concavity Variable-Slope DTC
This article presents a fractional-digital-to-time converter (DTC)-based digital phase-locked
loop (PLL), achieving simultaneously low phase noise and low spurious tones. The PLL …
loop (PLL), achieving simultaneously low phase noise and low spurious tones. The PLL …
Digital Phase-Locked Loops: Exploring Different Boundaries
This article examines the research area of digital phase-locked loops (DPLLs), a critical
component in modern electronic systems, from wireless communication devices to RADAR …
component in modern electronic systems, from wireless communication devices to RADAR …