A methodology is proposed to emulate and assess the single event effect in configuration
memory on 16 nm Ultrascale+ MPSoC. The solution depends on fault injection and fault tree …

The incidence of high-energy particles into the semiconductor device would induce single
event transients (SETs), which is a main threaten to MOS device. And the incidence …

The aim of alternative fault tolerant techniques used in flash-based FPGAs, such as Single
Event Transient (SET) filters, is to provide a resource savings advantage when compared to …

Due to the technology scaling, lower supply voltages and higher operating frequencies,
modern electronic devices become more and more vulnerable to transient faults. At the …

The recent trends for nanoelectronic computing systems include machine-to-machine
communication in the era of Internet-of-Things (IoT) and autonomous systems, complex …