This paper presents trends on CMOS high-voltage techniques for power integrated circuits
(PICs). Several fully CMOS compatible drain engineering techniques will be presented …

This paper presents and discusses trade-offs of three different design techniques intended
to improve the breakdown voltage of n-type lateral medium power transistors to be …

This paper firstly addresses smart power, discussing application areas and representative
examples. An overview of the present status of technologies which are used in smart power …

This paper presents trends on high-voltage techniques for power integrated circuits, using
standard low cost CMOS technologies with no extra processing steps. MOS devices layout …

This work investigates, through extensive two-dimensional device simulation and
experiments on prototypes, the prospects of integrating high-voltage blocking capability …