NASA: A generic infrastructure for system-level MP-SoC design space exploration

ZJ Jia, AD Pimentel, M Thompson… - 2010 8th IEEE …, 2010 - ieeexplore.ieee.org
System-level simulation and design space exploration (DSE) are key ingredients for the
design of multiprocessor system-on-chip (MP-SoC) based embedded systems. The efforts in …

A two-phase design space exploration strategy for system-level real-time application mapping onto MPSoC

ZJ Jia, A Núñez, T Bautista, AD Pimentel - Microprocessors and …, 2014 - Elsevier
In this paper, we present a two-phase design space exploration (DSE) approach to address
the problem of real-time application mapping on a flexible MPSoC platform. Our approach is …

A system-level infrastructure for multidimensional mp-soc design space co-exploration

ZJ Jia, T Bautista, A Núñez, AD Pimentel… - ACM Transactions on …, 2013 - dl.acm.org
In this article, we present a flexible and extensible system-level MP-SoC design space
exploration (DSE) infrastructure, called NASA. This highly modular framework uses well …

[PDF][PDF] Real-time application to multiprocessor-system-on-chip mapping strategy for system-level design tool

ZJ Jia, T Bautista, A Nuñez - Electronics letters, 2009 - academia.edu
A new static mapping technique is presented that can be integrated in a system-level design
tool for modelling and simulating real-time applications onto an embedded multiprocessor …

Combining on-hardware prototyping and high-level simulation for DSE of multi-ASIP systems

P Meloni, S Pomata, L Raffo, R Piscitelli… - 2012 International …, 2012 - ieeexplore.ieee.org
Modern heterogeneous multi-processor embedded systems very often expose to the
designer a large number of degrees of freedom, related to the application …

[PDF][PDF] SPEED-POWER EXPLORATION OF 2-D INTELLIGENCE NETWORK-ON-CHIP FOR MULTI-CLOCK MULTI-MICROCONTROLLER ON 28nm FPGA (Zynq-7000 …

AK Vishwakarma, U Arun - researchgate.net
Today's feature-rich multimedia products require embedded system solution with complex
System-on-Chip (SoC) to meet market expectations of high performance at low cost and …

Combining FPGA prototyping and high-level simulation approaches for Design Space Exploration of MPSoCs

S Pomata - 2013 - iris.unica.it
Modern embedded systems are parallel, component-based, heterogeneous and finely tuned
on the basis of the workload that must be executed on them. To improve design reuse …

System level design space exploration for MPSoC: methods, algorithms and new infrastructure

ZJ Jia Li - 2010 - accedacris.ulpgc.es
System level design espace exploration for MSSOC: methods, algorithms and new
intrastructure Page 1 INSTITUTO UNIVERSITARIO DE SISTEMAS INTELIGENTES Y …