Memory isolation is critical for system reliability, security, and safety. Unfortunately, read
disturbance can break memory isolation in modern DRAM chips. For example, RowHammer …

A memory circuit system and method are provided in the context of various embodiments. In
one embodiment, an interface circuit remains in communication with a plurality of memory …

One embodiment of the present invention sets forth a hybrid memory module that combines
memory devices of different types while presenting a single technology interface. The hybrid …

In one embodiment, an interface circuit is configured to couple to one or more flash memory
devices and is further configured to couple to a host system. The interface circuit is …

One embodiment of the present invention sets forth a memory module that includes at least
one memory chip, and an intelligent chip coupled to the at least one memory chip and a …

A memory module, which includes at least one memory stack, comprises a plurality of DRAM
integrated circuits and an interface circuit. The interface circuit interfaces the memory stack …

6,728,800 B1 4/2004 Lee et al........ 710, 54 2004/0236885 A1 11/2004 Fredriksson et al.
T10/100 6,735,679 B1 5/2004 Herbst et al.......... 711, 167 2004/0243769 A1 12/2004 Frame …

G06F 12/00(2006.01)(57) ABSTRACT G06F 12/06(2006.01) A memory circuit System and
method are provided in the G06F I3/00(2006.01) context of various embodiments. In one …

Continuation of application No. PCT/US2007/016385, filed on Jul. 18, 2007, which is a
continuation-in-part of application No. 1 1/461,439, filed on Jul. 31, 2006, and a continuation …

A system and method are provided for adjusting the timing of signals associated with a
memory system. A memory controller is provided. Additionally, at least one memory module …