Software engineering (SE) educators have been advocating the use of non-conventional
approaches for SE education since long. In this context, we conducted action-research to …

A large number of emerging applications such as implantables, wearables, printed
electronics, and IoT have ultra-low area and power constraints. These applications rely on …

Geyser-1, a prototype MIPS R3000 CPU with fine grain runtime PG for major computational
components in the execution stage is available. Function units such as CLU, shifter …

This paper proposes the ultrafine-grained run-time power gating of on-chip routers, in which
the power supply to each router component (eg, virtual-channel buffer, virtual-channel …

Power and energy efficiency are on the top priority list in embedded computing. Embedded
processors taped out in deep submicron technology have a high contribution of static power …

This paper describes a design and implementation methodology for fine-grain power gating.
Since sleep-in and wakeup are controlled in a fine granularity in run time, shortening the …

In this work, we investigate state-retentive power gating of register files for leakage reduction
in multicore processors supporting multithreading. In an in-order core, when a thread gets …

Power-performance efficiency is still remaining a primary concern for microprocessor
designers. One of the sources of power inefficiency for recent LSI chips is increasing …

In order to combat the exponentially growing leakage power in modern microprocessors,
researchers have proposed the use of alternative power-gating structures that can yield …

The energy efficiency of a CMOS architecture processing dynamic workloads directly affects
its ability to provide long battery lifetimes while maintaining required application …