Monotonic dynamic-static pseudo-NMOS logic circuit

L Forbes - US Patent 6,801,056, 2004 - Google Patents
Applications that use microelectronic components, Such as telecommunications equipment,
industrial control equipment, automotive electronics, etc., require more and more …

Methods and arrangements for a low power phase-locked loop

HC Ngo - US Patent 6,943,599, 2005 - Google Patents
BACKGROUND Clock generation for digital Systems generally requires clock frequencies
that are stable, and in many cases the digital System clock frequencies are related by …

Reduced power consumption limited-switch dynamic logic (LSDL) circuit

WA Belluomini, AM Saha - US Patent 7,598,774, 2009 - Google Patents
An limited-switch dynamic logic (LSDL) circuit provides reduced power consumption by
reducing clock power dissipation. By clocking LSDL gates with a clock signal having a …

Wide limited switch dynamic logic circuit implementations

J Sivagnaname, HC Ngo, KJ Nowka… - … Conference on VLSI …, 2006 - ieeexplore.ieee.org
Wide circuit implementation of limited switch dynamic logic (LSDL), a high performance logic
circuit, with a modified pseudo-nMOS style load has been studied in this paper. A …

Logic array and dynamic logic method

L Forbes - US Patent 6,946,879, 2005 - Google Patents
4,569,032 A 2/1986 Lee............................ 364/787 (57) ABSTRACT 4,797,580 A 1/1989
Sunter........ 307/451 5,525,916 A 6/1996 Gu et al...... 326/98 A monotonic dynamic-static …

Exogenous proteins expressed in avians and their eggs

R Ivarie, A Harvey, J Morris, G Liu… - US Patent App. 10 …, 2004 - Google Patents
This invention provides vectors and methods for the stable introduction of exogenous
nucleic acid Sequences into the genome of avians in order to express the exogenous …

Fast dynamic register with transparent latch

I Qureshi - US Patent 8,860,463, 2014 - Google Patents
(57) ABSTRACT A fast dynamic register including a data block, a precharge circuit, a
transparent latch, and an output logic gate. The precharge circuit precharges first and …

Variable pulse width and pulse separation clock generator

HC Ngo, WA Belluomini, RK Montoye - US Patent 6,891,399, 2005 - Google Patents
Dynamic logic is extensively being used in designing high-Speed complementary metal
oxide Semi-conductor (CMOS) circuits. Dynamic logic circuits are clocked cir cuits …

Scannable dynamic logic latch circuit

HC Ngo, JB Kuang, JD Warnock, DF Wendel - US Patent 7,372,305, 2008 - Google Patents
A scannable latch incorporates a logic front end that has at least one dynamic logic gate that
has a logic tree that perform the normal Boolean logic operation. The dynamic logic gate is …

Time division multiplexed limited switch dynamic logic

L Chang, RK Montoye, Y Nakamura - US Patent 8,493,093, 2013 - Google Patents
SUMMARY A limited switch dynamic logic (LSDL) circuit includes a dynamic logic circuit and
a static logic circuit. The dynamic logic circuit includes a precharge device configured to pre …